Simulation Results: otbn

 
12/03/2026 17:23:11 DVSim: v1.14.2 sha: bbf86e0 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 92.68 %
  • code
  • 92.30 %
  • assert
  • 88.71 %
  • func
  • 97.03 %
  • block
  • 98.99 %
  • line
  • 98.95 %
  • branch
  • 87.12 %
  • toggle
  • 88.25 %
  • FSM
  • 94.87 %
Validation stages
V1
90.91%
V2
78.95%
V2S
54.84%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
otbn_smoke 9.000s 0.000us 1 1 100.00
single_binary 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 4.000s 0.000us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 4.000s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 9.000s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 7.000s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 7.000s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 4.000s 0.000us 1 1 100.00
otbn_csr_aliasing 7.000s 0.000us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 78.000s 0.000us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 40.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 0 1 0.00
otbn_reset 4.000s 0.000us 0 1 0.00
multi_error 1 1 100.00
otbn_multi_err 34.000s 0.000us 1 1 100.00
back_to_back 0 1 0.00
otbn_multi 4.000s 0.000us 0 1 0.00
stress_all 0 1 0.00
otbn_stress_all 4.000s 0.000us 0 1 0.00
lc_escalation 0 1 0.00
otbn_escalate 4.000s 0.000us 0 1 0.00
zero_state_err_urnd 1 1 100.00
otbn_zero_state_err_urnd 4.000s 0.000us 1 1 100.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 5.000s 0.000us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 4.000s 0.000us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 3.000s 0.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 5.000s 0.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 5.000s 0.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 4.000s 0.000us 1 1 100.00
otbn_csr_rw 4.000s 0.000us 1 1 100.00
otbn_csr_aliasing 7.000s 0.000us 1 1 100.00
otbn_same_csr_outstanding 4.000s 0.000us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 4.000s 0.000us 1 1 100.00
otbn_csr_rw 4.000s 0.000us 1 1 100.00
otbn_csr_aliasing 7.000s 0.000us 1 1 100.00
otbn_same_csr_outstanding 4.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 1 2 50.00
otbn_imem_err 9.000s 0.000us 1 1 100.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
internal_integrity 1 4 25.00
otbn_alu_bignum_mod_err 4.000s 0.000us 0 1 0.00
otbn_controller_ispr_rdata_err 4.000s 0.000us 0 1 0.00
otbn_mac_bignum_acc_err 4.000s 0.000us 0 1 0.00
otbn_urnd_err 4.000s 0.000us 1 1 100.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 5.000s 0.000us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 4.000s 0.000us 1 1 100.00
otbn_non_sec_partial_wipe 0 1 0.00
otbn_partial_wipe 3.000s 0.000us 0 1 0.00
tl_intg_err 2 2 100.00
otbn_tl_intg_err 10.000s 0.000us 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
passthru_mem_tl_intg_err 0 1 0.00
otbn_passthru_mem_tl_intg_err 4.000s 0.000us 0 1 0.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 9.000s 0.000us 1 1 100.00
sec_cm_data_mem_integrity 0 1 0.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 9.000s 0.000us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 10.000s 0.000us 1 1 100.00
sec_cm_controller_fsm_global_esc 0 1 0.00
otbn_escalate 4.000s 0.000us 0 1 0.00
sec_cm_controller_fsm_local_esc 4 5 80.00
otbn_imem_err 9.000s 0.000us 1 1 100.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 4.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 5.000s 0.000us 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_scramble_key_sideload 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
sec_cm_scramble_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 9.000s 0.000us 1 1 100.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 4.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 5.000s 0.000us 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 0 1 0.00
otbn_escalate 4.000s 0.000us 0 1 0.00
sec_cm_start_stop_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 9.000s 0.000us 1 1 100.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 4.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 5.000s 0.000us 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_data_reg_sw_sca 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 4.000s 0.000us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 6.000s 0.000us 1 1 100.00
sec_cm_rnd_bus_consistency 0 1 0.00
otbn_rnd_sec_cm 5.000s 0.000us 0 1 0.00
sec_cm_rnd_rng_digest 0 1 0.00
otbn_rnd_sec_cm 5.000s 0.000us 0 1 0.00
sec_cm_rf_base_data_reg_sw_integrity 0 1 0.00
otbn_rf_base_intg_err 4.000s 0.000us 0 1 0.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 0 1 0.00
otbn_rf_bignum_intg_err 4.000s 0.000us 0 1 0.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
sec_cm_loop_stack_addr_integrity 0 1 0.00
otbn_stack_addr_integ_chk 5.000s 0.000us 0 1 0.00
sec_cm_call_stack_addr_integrity 0 1 0.00
otbn_stack_addr_integ_chk 5.000s 0.000us 0 1 0.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 4.000s 0.000us 1 1 100.00
sec_cm_data_mem_sec_wipe 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
sec_cm_instruction_mem_sec_wipe 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
sec_cm_data_reg_sw_sec_wipe 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
sec_cm_write_mem_integrity 0 1 0.00
otbn_multi 4.000s 0.000us 0 1 0.00
sec_cm_ctrl_flow_count 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
sec_cm_ctrl_flow_sca 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
sec_cm_data_mem_sw_noaccess 0 1 0.00
otbn_sw_no_acc 5.000s 0.000us 0 1 0.00
sec_cm_key_sideload 0 1 0.00
otbn_single 4.000s 0.000us 0 1 0.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 76.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 5.000s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
UVM_FATAL (otbn_scoreboard.sv:550) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a recov alert but it still hasn't arrived.
otbn_passthru_mem_tl_intg_err 78776264243252884133207832575710187641712725336506891063442339610309683287672 86
UVM_FATAL @ 7138274 ps: (otbn_scoreboard.sv:550) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a recov alert but it still hasn't arrived.
UVM_INFO @ 7138274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value.
otbn_single 61271553769687702283031290722734742878224590159098303492077810106938278757063 116
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 14779612 PS + 42) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 14779612 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 14779612 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_multi 10312425281130398768846036243669194318425031742215940142928695681590018298944 149
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 68987444 PS + 25) Sampled value (27705693502268022) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 68987444 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subv'
UVM_INFO @ 68987444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_reset 65719391380168254605261525392631678153519272091345750574299598669410756178787 117
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 44838191 PS + 32) Sampled value (108225365239926) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 44838191 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.shv'
UVM_INFO @ 44838191 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_dmem_err 92761123074051917669127277628976242259086218612599396508776601403264702920606 108
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 12598917 PS + 29) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 12598917 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 12598917 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_escalate 59197971758573487313352910282473659945968989786047464978766855113996990320759 109
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 12223323 PS + 38) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 12223323 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 12223323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_mac_bignum_acc_err 66066052435740830211561522170703093219179808252432097917688560091509180220452 107
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4674988 PS + 23) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 4674988 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 4674988 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_rf_bignum_intg_err 35472067984841378643127585272186631052082850108172292620287706548537794201567 111
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4358446 PS + 32) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 4358446 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 4358446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all 81730861816630453109134123959618662060667382053609307010690124649784406201756 147
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4415159 PS + 32) Sampled value (27705693518851634) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4206_1.cur_cp) is an illegal value.
UVM_FATAL @ 4415159 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn2'
UVM_INFO @ 4415159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_rnd_sec_cm 35280074747600632350056036065662669758325869186396896333435001874457410866367 107
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 15020093 PS + 25) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 15020093 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 15020093 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_sw_no_acc 25222933488415145482165524949782937037396751205295028059659453996434445635842 109
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 104066747 PS + 41) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 104066747 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 104066747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stack_addr_integ_chk 8714540839082225056961095201077518550924781862053423576265904590236833045678 114
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 14425175 PS + 23) Sampled value (7092657458986120813) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 14425175 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addvm'
UVM_INFO @ 14425175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,152): Assertion NoModelErrs has failed
otbn_alu_bignum_mod_err 33816226506854031794693836863338897100287121015633131037692371533509423714752 116
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 10082412 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 10082412 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 10082412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_controller_ispr_rdata_err 20429397278873547827112829981294091579566295111923704298017625639052984568774 119
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 14691772 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 14691772 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 14691772 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_rf_base_intg_err 82657821101148198842311993831560563472230960606963439925661550441558599532838 117
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 17680529 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 17680529 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 17680529 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all_with_rand_reset 108946620198419720003596264699205754022240955234051791456418461464788234133039 156
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,152): (time 38097940 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 38097940 ps: (otbn_model_if.sv:152) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 38097940 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sim_*/tb.sv,292): Assertion MatchingStatus_A has failed
otbn_partial_wipe 72240679895893738694520170566581972978064353254093026373618937087740922574897 111
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sim_0.1/tb.sv,292): (time 13472384 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 13472384 ps: (tb.sv:292) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 13472384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---