| V1 |
|
90.91% |
| V2 |
|
73.68% |
| V2S |
|
50.00% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| otbn_smoke | 9.000s | 0.000us | 1 | 1 | 100.00 | |
| single_binary | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| otbn_csr_rw | 8.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| otbn_csr_bit_bash | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| otbn_csr_aliasing | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| otbn_csr_mem_rw_with_rand_reset | 12.000s | 0.000us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| otbn_csr_rw | 8.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| otbn_mem_walk | 34.000s | 0.000us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| otbn_mem_partial_access | 44.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reset_recovery | 0 | 1 | 0.00 | |||
| otbn_reset | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| multi_error | 1 | 1 | 100.00 | |||
| otbn_multi_err | 36.000s | 0.000us | 1 | 1 | 100.00 | |
| back_to_back | 0 | 1 | 0.00 | |||
| otbn_multi | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| otbn_stress_all | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| lc_escalation | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| zero_state_err_urnd | 0 | 1 | 0.00 | |||
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sw_errs_fatal_chk | 0 | 1 | 0.00 | |||
| otbn_sw_errs_fatal_chk | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| otbn_alert_test | 3.000s | 0.000us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| otbn_intr_test | 3.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 8.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 8.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| mem_integrity | 0 | 2 | 0.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| internal_integrity | 1 | 4 | 25.00 | |||
| otbn_alu_bignum_mod_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_controller_ispr_rdata_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_mac_bignum_acc_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_urnd_err | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| illegal_bus_access | 1 | 1 | 100.00 | |||
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_mem_gnt_acc_err | 1 | 1 | 100.00 | |||
| otbn_mem_gnt_acc_err | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_non_sec_partial_wipe | 1 | 1 | 100.00 | |||
| otbn_partial_wipe | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_tl_intg_err | 10.000s | 0.000us | 1 | 1 | 100.00 | |
| passthru_mem_tl_intg_err | 1 | 1 | 100.00 | |||
| otbn_passthru_mem_tl_intg_err | 18.000s | 0.000us | 1 | 1 | 100.00 | |
| prim_fsm_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| prim_count_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_mem_scramble | 1 | 1 | 100.00 | |||
| otbn_smoke | 9.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_instruction_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| otbn_tl_intg_err | 10.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_scramble_key_sideload | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_scramble_ctrl_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sca | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_redun | 0 | 1 | 0.00 | |||
| otbn_ctrl_redun | 3.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_pc_ctrl_flow_redun | 1 | 1 | 100.00 | |||
| otbn_pc_ctrl_flow_redun | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rnd_bus_consistency | 0 | 1 | 0.00 | |||
| otbn_rnd_sec_cm | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rnd_rng_digest | 0 | 1 | 0.00 | |||
| otbn_rnd_sec_cm | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rf_base_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_base_intg_err | 7.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_stack_wr_ptr_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_bignum_intg_err | 13.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_addr_integrity | 0 | 1 | 0.00 | |||
| otbn_stack_addr_integ_chk | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_call_stack_addr_integrity | 0 | 1 | 0.00 | |||
| otbn_stack_addr_integ_chk | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_start_stop_ctrl_state_consistency | 0 | 1 | 0.00 | |||
| otbn_sec_wipe_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_mem_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_instruction_mem_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_reg_sw_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_write_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_multi | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_flow_count | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_flow_sca | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_mem_sw_noaccess | 1 | 1 | 100.00 | |||
| otbn_sw_no_acc | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_key_sideload | 0 | 1 | 0.00 | |||
| otbn_single | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_tlul_fifo_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 183.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| otbn_stress_all_with_rand_reset | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value. | ||||
| otbn_single | 28126483256721520526330458041521403322573326532728873422238514488703870765891 | 124 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 41146665 PS + 30) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 41146665 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 41146665 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_multi | 110758764820604199455134591040590483754199288261179099721381824773284853299512 | 157 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 61214447 PS + 25) Sampled value (1815720322767735123308) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 61214447 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvml'
UVM_INFO @ 61214447 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_reset | 61856655381361306089254834012983898841096988289185613043417527692849390935554 | 132 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 26622853 PS + 25) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 26622853 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 26622853 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_imem_err | 63202624601893434149722969367206737058268336582087723284553392347768530568620 | 115 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 26509418 PS + 23) Sampled value (1815720322767735123308) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 26509418 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvml'
UVM_INFO @ 26509418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_dmem_err | 68114949822121537245277034686252652703871851059041036440598311044421032721238 | 117 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4092661 PS + 41) Sampled value (27705693502268022) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 4092661 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subv'
UVM_INFO @ 4092661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_alu_bignum_mod_err | 55890778854350369492455034388569203922397989478119273101844895184572751010396 | 118 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 13471866 PS + 29) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 13471866 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 13471866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_controller_ispr_rdata_err | 47039935162566563786048586792724873491480613680020597309828224779725729682811 | 112 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 8875615 PS + 30) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 8875615 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 8875615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_mac_bignum_acc_err | 102570140337113636045204011369837475409252088064159498866309935773262018620888 | 113 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 10361705 PS + 27) Sampled value (7092657510811465325) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 10361705 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvm'
UVM_INFO @ 10361705 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_stress_all | 53131631774097901046832976685649436545499441638976800875993891839927437596313 | 153 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 44843085 PS + 41) Sampled value (27705693401607286) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4206_1.cur_cp) is an illegal value.
UVM_FATAL @ 44843085 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulv'
UVM_INFO @ 44843085 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_stress_all_with_rand_reset | 80554156391079439122093704266366829994956661552250479955646816823647160302028 | 155 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 16537702 PS + 25) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4208_1.cur_cp) is an illegal value.
UVM_FATAL @ 16537702 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 16537702 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_zero_state_err_urnd | 89383437178551920915550951055890202812458302940133256072258563479212664836627 | 114 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 6915325 PS + 27) Sampled value (7092657510811465324) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 6915325 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvl'
UVM_INFO @ 6915325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_sw_errs_fatal_chk | 71849802117970603287032187298074456895029020742315424698076666105935621479437 | 111 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 20372435 PS + 23) Sampled value (7092657458986120813) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 20372435 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addvm'
UVM_INFO @ 20372435 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_rnd_sec_cm | 109443868047146820130311400330065560605470142140164797280882655020662390961063 | 112 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 12365888 PS + 25) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 12365888 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 12365888 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_ctrl_redun | 39379257982713279995100728172817917972015641465243423122474427611619496097852 | 114 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 8236851 PS + 25) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 8236851 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 8236851 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_sec_wipe_err | 15866595647101087715644461458466332936040618087681994267245312568970006372233 | 107 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 12253782 PS + 38) Sampled value (7092657510811465324) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 12253782 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvl'
UVM_INFO @ 12253782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_stack_addr_integ_chk | 45560146022748086258459491643026757631373799854062426914998760829185270103687 | 110 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4340684 PS + 27) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 4340684 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 4340684 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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