Simulation Results: otbn

 
17/03/2026 17:25:29 DVSim: v1.16.0 sha: bb824c6 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 92.58 %
  • code
  • 92.18 %
  • assert
  • 88.54 %
  • func
  • 97.03 %
  • block
  • 98.98 %
  • line
  • 98.96 %
  • branch
  • 86.59 %
  • toggle
  • 85.72 %
  • FSM
  • 97.44 %
Validation stages
V1
100.00%
V2
78.95%
V2S
67.74%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
otbn_smoke 9.000s 0.000us 1 1 100.00
single_binary 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 6.000s 0.000us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 4.000s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 4.000s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 3.000s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 7.000s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 4.000s 0.000us 1 1 100.00
otbn_csr_aliasing 3.000s 0.000us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 27.000s 0.000us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 30.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 0 1 0.00
otbn_reset 4.000s 0.000us 0 1 0.00
multi_error 1 1 100.00
otbn_multi_err 41.000s 0.000us 1 1 100.00
back_to_back 0 1 0.00
otbn_multi 21.000s 0.000us 0 1 0.00
stress_all 0 1 0.00
otbn_stress_all 4.000s 0.000us 0 1 0.00
lc_escalation 1 1 100.00
otbn_escalate 6.000s 0.000us 1 1 100.00
zero_state_err_urnd 1 1 100.00
otbn_zero_state_err_urnd 5.000s 0.000us 1 1 100.00
sw_errs_fatal_chk 0 1 0.00
otbn_sw_errs_fatal_chk 4.000s 0.000us 0 1 0.00
alert_test 1 1 100.00
otbn_alert_test 3.000s 0.000us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 3.000s 0.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 5.000s 0.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 5.000s 0.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 6.000s 0.000us 1 1 100.00
otbn_csr_rw 4.000s 0.000us 1 1 100.00
otbn_csr_aliasing 3.000s 0.000us 1 1 100.00
otbn_same_csr_outstanding 3.000s 0.000us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 6.000s 0.000us 1 1 100.00
otbn_csr_rw 4.000s 0.000us 1 1 100.00
otbn_csr_aliasing 3.000s 0.000us 1 1 100.00
otbn_same_csr_outstanding 3.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 0 2 0.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
internal_integrity 3 4 75.00
otbn_alu_bignum_mod_err 5.000s 0.000us 0 1 0.00
otbn_controller_ispr_rdata_err 9.000s 0.000us 1 1 100.00
otbn_mac_bignum_acc_err 7.000s 0.000us 1 1 100.00
otbn_urnd_err 4.000s 0.000us 1 1 100.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 5.000s 0.000us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 7.000s 0.000us 1 1 100.00
otbn_non_sec_partial_wipe 1 1 100.00
otbn_partial_wipe 4.000s 0.000us 1 1 100.00
tl_intg_err 2 2 100.00
otbn_tl_intg_err 17.000s 0.000us 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 33.000s 0.000us 1 1 100.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 9.000s 0.000us 1 1 100.00
sec_cm_data_mem_integrity 0 1 0.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
sec_cm_instruction_mem_integrity 0 1 0.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 17.000s 0.000us 1 1 100.00
sec_cm_controller_fsm_global_esc 1 1 100.00
otbn_escalate 6.000s 0.000us 1 1 100.00
sec_cm_controller_fsm_local_esc 3 5 60.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 5.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 5.000s 0.000us 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 3 5 60.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 5.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 5.000s 0.000us 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 1 1 100.00
otbn_escalate 6.000s 0.000us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_local_esc 3 5 60.00
otbn_imem_err 4.000s 0.000us 0 1 0.00
otbn_dmem_err 4.000s 0.000us 0 1 0.00
otbn_zero_state_err_urnd 5.000s 0.000us 1 1 100.00
otbn_illegal_mem_acc 5.000s 0.000us 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_ctrl_redun 0 1 0.00
otbn_ctrl_redun 5.000s 0.000us 0 1 0.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 5.000s 0.000us 1 1 100.00
sec_cm_rnd_bus_consistency 0 1 0.00
otbn_rnd_sec_cm 5.000s 0.000us 0 1 0.00
sec_cm_rnd_rng_digest 0 1 0.00
otbn_rnd_sec_cm 5.000s 0.000us 0 1 0.00
sec_cm_rf_base_data_reg_sw_integrity 0 1 0.00
otbn_rf_base_intg_err 5.000s 0.000us 0 1 0.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 0 1 0.00
otbn_rf_bignum_intg_err 4.000s 0.000us 0 1 0.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
sec_cm_loop_stack_addr_integrity 0 1 0.00
otbn_stack_addr_integ_chk 5.000s 0.000us 0 1 0.00
sec_cm_call_stack_addr_integrity 0 1 0.00
otbn_stack_addr_integ_chk 5.000s 0.000us 0 1 0.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 5.000s 0.000us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_write_mem_integrity 0 1 0.00
otbn_multi 21.000s 0.000us 0 1 0.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_data_mem_sw_noaccess 0 1 0.00
otbn_sw_no_acc 4.000s 0.000us 0 1 0.00
sec_cm_key_sideload 1 1 100.00
otbn_single 5.000s 0.000us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 100.000s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 30.000s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value.
otbn_multi 25791965248419264279450522183795790205732720285598172218024596806585071384800 160
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 156876271 PS + 23) Sampled value (7092657510811465325) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 156876271 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvm'
UVM_INFO @ 156876271 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_reset 56239675385047605940330310923852119898102606971811334141306502332299989000560 119
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 11841092 PS + 26) Sampled value (27705693502268022) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 11841092 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subv'
UVM_INFO @ 11841092 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_imem_err 69250975586023607427183930018017761751584106223078249624298392566354044043036 121
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 17780434 PS + 38) Sampled value (1815720322767735123308) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 17780434 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvml'
UVM_INFO @ 17780434 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_dmem_err 12349088281422020648106476809228784086299306150193772330426799008875223839784 121
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 18021274 PS + 33) Sampled value (27705693518851633) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 18021274 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn1'
UVM_INFO @ 18021274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_alu_bignum_mod_err 27110941326444987458965983802742724236273048627016774379177854607269894388543 114
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 11346657 PS + 39) Sampled value (7092657510811465325) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 11346657 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvm'
UVM_INFO @ 11346657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_rf_bignum_intg_err 34564986399625251266133281094789358122303524985923979843153835281907819812516 111
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 23687286 PS + 25) Sampled value (1815720322767735123308) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 23687286 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvml'
UVM_INFO @ 23687286 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_rf_base_intg_err 24382584251793796815233199246483699928117396238523300406815516601657204145665 110
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 7464404 PS + 25) Sampled value (27705693518851634) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 7464404 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn2'
UVM_INFO @ 7464404 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stress_all 38775407581054848642738885002939645546731897294692431839234910334312753086478 144
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 12102918 PS + 25) Sampled value (27705693518851634) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4206_1.cur_cp) is an illegal value.
UVM_FATAL @ 12102918 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.trn2'
UVM_INFO @ 12102918 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_sw_errs_fatal_chk 39502057598730500291155347103440839813507329294297096085693438015377158895506 114
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 8846314 PS + 31) Sampled value (7092657458986120813) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 8846314 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addvm'
UVM_INFO @ 8846314 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_rnd_sec_cm 80108268121426724111159742774605045096936219783817852764313865356946631793557 112
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 51993342 PS + 42) Sampled value (7092657536580613741) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 51993342 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subvm'
UVM_INFO @ 51993342 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_sw_no_acc 76430480629551433036606933867280580972592106140562904134900670860012565316750 108
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 23096356 PS + 25) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 23096356 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 23096356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
otbn_stack_addr_integ_chk 83293180809329391961393797399938786860529387120789481349466127180096704143297 107
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 10385972 PS + 29) Sampled value (7092657510811465324) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 10385972 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvl'
UVM_INFO @ 10385972 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1237) [otbn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
otbn_stress_all_with_rand_reset 71309692677144371268136706709578190281135112402779153698318398630302320468005 177
UVM_ERROR @ 245520792 ps: (cip_base_vseq.sv:1237) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 245520792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ1] name tb.dut.u_otbn_core.u_otbn_mac_bignum.operation_i.zero_acc cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)
otbn_ctrl_redun 73773027990231827019975042565954097771477558421248691307414433131842511922439 108
UVM_ERROR @ 51591194 ps: (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ1] name tb.dut.u_otbn_core.u_otbn_mac_bignum.operation_i.zero_acc cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)
UVM_INFO @ 51591194 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---