Simulation Results: prim_esc

 
19/03/2026 20:49:13 DVSim: v1.16.0 sha: 1b83ebf json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 83.19 %
  • code
  • 81.19 %
  • assert
  • 85.19 %
  • line
  • 88.07 %
  • branch
  • 75.56 %
  • cond
  • 78.05 %
  • toggle
  • 100.00 %
  • FSM
  • 64.29 %
Validation stages
V1
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
prim_esc_request_test 1 1 100.00
prim_esc_test 0.540s 0.000us 1 1 100.00
prim_ping_req_interrupted_by_esc_req_test 1 1 100.00
prim_esc_test 0.540s 0.000us 1 1 100.00
prim_esc_tx_integrity_errors_test 1 1 100.00
prim_esc_test 0.540s 0.000us 1 1 100.00
prim_esc_reverse_ping_timeout_test 1 1 100.00
prim_esc_test 0.540s 0.000us 1 1 100.00
prim_esc_receiver_counter_fail_test 1 1 100.00
prim_esc_test 0.540s 0.000us 1 1 100.00
prim_esc_handshake_with_rand_reset_test 1 1 100.00
prim_esc_test 0.540s 0.000us 1 1 100.00