| V1 |
|
90.91% |
| V2 |
|
78.95% |
| V2S |
|
48.39% |
| V3 |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| otbn_smoke | 8.000s | 0.000us | 1 | 1 | 100.00 | |
| single_binary | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| otbn_csr_bit_bash | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| otbn_csr_aliasing | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| otbn_csr_mem_rw_with_rand_reset | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| mem_walk | 1 | 1 | 100.00 | |||
| otbn_mem_walk | 48.000s | 0.000us | 1 | 1 | 100.00 | |
| mem_partial_access | 1 | 1 | 100.00 | |||
| otbn_mem_partial_access | 36.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| reset_recovery | 0 | 1 | 0.00 | |||
| otbn_reset | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| multi_error | 1 | 1 | 100.00 | |||
| otbn_multi_err | 41.000s | 0.000us | 1 | 1 | 100.00 | |
| back_to_back | 0 | 1 | 0.00 | |||
| otbn_multi | 10.000s | 0.000us | 0 | 1 | 0.00 | |
| stress_all | 0 | 1 | 0.00 | |||
| otbn_stress_all | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| lc_escalation | 1 | 1 | 100.00 | |||
| otbn_escalate | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| zero_state_err_urnd | 0 | 1 | 0.00 | |||
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| sw_errs_fatal_chk | 1 | 1 | 100.00 | |||
| otbn_sw_errs_fatal_chk | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| otbn_alert_test | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| otbn_intr_test | 3.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| otbn_tl_errors | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| otbn_csr_hw_reset | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_rw | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_csr_aliasing | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_same_csr_outstanding | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| mem_integrity | 0 | 2 | 0.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| internal_integrity | 2 | 4 | 50.00 | |||
| otbn_alu_bignum_mod_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_controller_ispr_rdata_err | 7.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_mac_bignum_acc_err | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_urnd_err | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| illegal_bus_access | 1 | 1 | 100.00 | |||
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_mem_gnt_acc_err | 0 | 1 | 0.00 | |||
| otbn_mem_gnt_acc_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_non_sec_partial_wipe | 1 | 1 | 100.00 | |||
| otbn_partial_wipe | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_tl_intg_err | 9.000s | 0.000us | 1 | 1 | 100.00 | |
| passthru_mem_tl_intg_err | 1 | 1 | 100.00 | |||
| otbn_passthru_mem_tl_intg_err | 49.000s | 0.000us | 1 | 1 | 100.00 | |
| prim_fsm_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| prim_count_check | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_mem_scramble | 1 | 1 | 100.00 | |||
| otbn_smoke | 8.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_dmem_err | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_instruction_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| otbn_tl_intg_err | 9.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_controller_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_scramble_key_sideload | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_scramble_ctrl_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_scramble_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_global_esc | 1 | 1 | 100.00 | |||
| otbn_escalate | 4.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_local_esc | 2 | 5 | 40.00 | |||
| otbn_imem_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_dmem_err | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_zero_state_err_urnd | 4.000s | 0.000us | 0 | 1 | 0.00 | |
| otbn_illegal_mem_acc | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_start_stop_ctrl_fsm_sparse | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_data_reg_sw_sca | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_redun | 1 | 1 | 100.00 | |||
| otbn_ctrl_redun | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_pc_ctrl_flow_redun | 1 | 1 | 100.00 | |||
| otbn_pc_ctrl_flow_redun | 6.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rnd_bus_consistency | 0 | 1 | 0.00 | |||
| otbn_rnd_sec_cm | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rnd_rng_digest | 0 | 1 | 0.00 | |||
| otbn_rnd_sec_cm | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rf_base_data_reg_sw_integrity | 1 | 1 | 100.00 | |||
| otbn_rf_base_intg_err | 5.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_base_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_stack_wr_ptr_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_rf_bignum_data_reg_sw_integrity | 0 | 1 | 0.00 | |||
| otbn_rf_bignum_intg_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_rf_bignum_data_reg_sw_glitch_detect | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| sec_cm_loop_stack_addr_integrity | 0 | 1 | 0.00 | |||
| otbn_stack_addr_integ_chk | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_call_stack_addr_integrity | 0 | 1 | 0.00 | |||
| otbn_stack_addr_integ_chk | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_start_stop_ctrl_state_consistency | 0 | 1 | 0.00 | |||
| otbn_sec_wipe_err | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_mem_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_instruction_mem_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_reg_sw_sec_wipe | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_write_mem_integrity | 0 | 1 | 0.00 | |||
| otbn_multi | 10.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_flow_count | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_ctrl_flow_sca | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_data_mem_sw_noaccess | 0 | 1 | 0.00 | |||
| otbn_sw_no_acc | 5.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_key_sideload | 0 | 1 | 0.00 | |||
| otbn_single | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| sec_cm_tlul_fifo_ctr_redun | 1 | 1 | 100.00 | |||
| otbn_sec_cm | 347.000s | 0.000us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 0 | 1 | 0.00 | |||
| otbn_stress_all_with_rand_reset | 6.000s | 0.000us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@*_*.cur_cp) is an illegal value. | ||||
| otbn_single | 36761965609397739558682208030021189552399864867290111175930791215163179648732 | 148 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 61815168 PS + 39) Sampled value (27705693401607286) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 61815168 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulv'
UVM_INFO @ 61815168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_multi | 56951527831653410448849269557085546621393620083703194594000350187868275124974 | 174 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 239144751 PS + 33) Sampled value (7092657536580613741) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 239144751 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subvm'
UVM_INFO @ 239144751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_reset | 103539495832833046056593340036508960934915773721175058672761457216288155882856 | 140 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 12382793 PS + 25) Sampled value (27705693502268022) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 12382793 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subv'
UVM_INFO @ 12382793 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_imem_err | 40494462880196974575963965369647351893917959142232494382965593242560806785351 | 135 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 35887081 PS + 41) Sampled value (7092657510811465324) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 35887081 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvl'
UVM_INFO @ 35887081 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_dmem_err | 10601685889400928352183488614987326644840333936400087075011483814209735000758 | 125 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 8218284 PS + 25) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 8218284 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 8218284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_alu_bignum_mod_err | 62901924638799423964979772225403822460663261840071323598681711307886979576211 | 120 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 10168664 PS + 29) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 10168664 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 10168664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_mac_bignum_acc_err | 98706187584454701293502857145962432341922936167971534153260526848982361012669 | 118 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 14255651 PS + 29) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 14255651 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 14255651 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_rf_bignum_intg_err | 111797282821922341777672438652330323548551399308765636148548252292289646257910 | 109 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 12065483 PS + 25) Sampled value (27705693535367275) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 12065483 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.unpk'
UVM_INFO @ 12065483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_stress_all | 86532030920033430233735332251249189661874282821900273308882589875740380938889 | 145 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 10100524 PS + 39) Sampled value (27705693450625899) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4206_1.cur_cp) is an illegal value.
UVM_FATAL @ 10100524 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.pack'
UVM_INFO @ 10100524 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_stress_all_with_rand_reset | 46024112430978194608363320134562504305021805267469382475592086559536632430992 | 151 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 199232745 PS + 25) Sampled value (7092657510811465325) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4208_1.cur_cp) is an illegal value.
UVM_FATAL @ 199232745 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvm'
UVM_INFO @ 199232745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_zero_state_err_urnd | 100480963019655950616091417825311343165281352315857953747880590162163865788115 | 113 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 11865590 PS + 35) Sampled value (7092657510811465325) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 11865590 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvm'
UVM_INFO @ 11865590 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otbn_rnd_sec_cm | 29333457367950047027286190419404396532768464976042395162255378716277992063978 | 108 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 10105859 PS + 27) Sampled value (7092657536580613741) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 10105859 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.subvm'
UVM_INFO @ 10105859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_sec_wipe_err | 9689144825626673048132163611422491210402940075315217561704051406477329933670 | 110 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 9574016 PS + 39) Sampled value (27705693401607286) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 9574016 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulv'
UVM_INFO @ 9574016 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_sw_no_acc | 23057167148707871867130501720971694835401091959868917174676739705497134044889 | 106 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 9232997 PS + 25) Sampled value (27705693199164534) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 9232997 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.addv'
UVM_INFO @ 9232997 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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| otbn_mem_gnt_acc_err | 13675874202170546965059840667966631823221277718625021960704671752742877601177 | 115 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 4425470 PS + 25) Sampled value (7092657510811465324) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 4425470 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvl'
UVM_INFO @ 4425470 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
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| otbn_stack_addr_integ_chk | 57842401431003422144479997564150686840197625059785577315064924018898090888859 | 109 |
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 733):(Time: 20443461 PS + 18) Sampled value (7092657510811465324) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4205_1.cur_cp) is an illegal value.
UVM_FATAL @ 20443461 ps: (otbn_env_cov.sv:2538) [uvm_test_top.env.cov] Unknown encoding () for instruction `bn.mulvl'
UVM_INFO @ 20443461 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
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