Simulation Results: i2c

 
24/03/2026 17:19:26 DVSim: v1.16.0 sha: 4125149 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.55 %
  • code
  • 81.44 %
  • assert
  • 96.19 %
  • func
  • 82.03 %
  • line
  • 96.38 %
  • branch
  • 92.19 %
  • cond
  • 84.93 %
  • toggle
  • 89.66 %
  • FSM
  • 44.05 %
Validation stages
V1
100.00%
V2
89.80%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 59.620s 0.000us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 13.330s 0.000us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.850s 0.000us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.720s 0.000us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 2.040s 0.000us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.600s 0.000us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 0.950s 0.000us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.720s 0.000us 1 1 100.00
i2c_csr_aliasing 1.600s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.960s 0.000us 0 1 0.00
host_stress_all 0 1 0.00
i2c_host_stress_all 19.270s 0.000us 0 1 0.00
host_maxperf 1 1 100.00
i2c_host_perf 16.350s 0.000us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.870s 0.000us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 173.280s 0.000us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 42.340s 0.000us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 0.910s 0.000us 1 1 100.00
i2c_host_fifo_fmt_empty 4.120s 0.000us 1 1 100.00
i2c_host_fifo_reset_rx 6.160s 0.000us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 79.880s 0.000us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 8.490s 0.000us 1 1 100.00
i2c_host_mode_toggle 0 1 0.00
i2c_host_mode_toggle 1.490s 0.000us 0 1 0.00
target_glitch 0 1 0.00
i2c_target_glitch 2.150s 0.000us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 138.220s 0.000us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 3.950s 0.000us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 30.830s 0.000us 1 1 100.00
i2c_target_intr_smoke 5.250s 0.000us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 1.050s 0.000us 1 1 100.00
i2c_target_fifo_reset_tx 0.930s 0.000us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 879.570s 0.000us 1 1 100.00
i2c_target_stress_rd 30.830s 0.000us 1 1 100.00
i2c_target_intr_stress_wr 37.930s 0.000us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 4.630s 0.000us 1 1 100.00
target_clock_stretch 1 1 100.00
i2c_target_stretch 16.400s 0.000us 1 1 100.00
bad_address 1 1 100.00
i2c_target_bad_addr 2.970s 0.000us 1 1 100.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 4.580s 0.000us 0 1 0.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 1.640s 0.000us 1 1 100.00
i2c_target_fifo_watermarks_tx 0.920s 0.000us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 16.350s 0.000us 1 1 100.00
i2c_host_perf_precise 152.200s 0.000us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 8.490s 0.000us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 1.220s 0.000us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 2.060s 0.000us 1 1 100.00
i2c_target_nack_acqfull_addr 2.060s 0.000us 1 1 100.00
i2c_target_nack_txstretch 1.330s 0.000us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 2.390s 0.000us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.650s 0.000us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.670s 0.000us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.680s 0.000us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 2.400s 0.000us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 2.400s 0.000us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.850s 0.000us 1 1 100.00
i2c_csr_rw 0.720s 0.000us 1 1 100.00
i2c_csr_aliasing 1.600s 0.000us 1 1 100.00
i2c_same_csr_outstanding 0.790s 0.000us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.850s 0.000us 1 1 100.00
i2c_csr_rw 0.720s 0.000us 1 1 100.00
i2c_csr_aliasing 1.600s 0.000us 1 1 100.00
i2c_same_csr_outstanding 0.790s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_sec_cm 0.750s 0.000us 1 1 100.00
i2c_tl_intg_err 1.360s 0.000us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.360s 0.000us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 4.850s 0.000us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 1.400s 0.000us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 3.630s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between
i2c_host_error_intr 51726153501929329891969470581589565852569094213250921149375717639888083345550 86
UVM_ERROR @ 22901004 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 22901004 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
i2c_host_stress_all 83476037830593409990283030562660671310287601879911739086662957603708186324821 119
UVM_ERROR @ 5799673111 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
UVM_INFO @ 5799673111 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between
i2c_target_glitch 32474717844665357509432367641907258608487393455943538641037420699435105696542 84
UVM_ERROR @ 880395383 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
UVM_INFO @ 880395383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*])
i2c_target_unexp_stop 48268155581116134708221265174012601107192796066917540329499235991626045825715 78
UVM_ERROR @ 489283248 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 34 [0x22])
UVM_INFO @ 489283248 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
i2c_target_hrst 42927379769413704274496302623221732521618543431493469583833775498674824866462 79
UVM_FATAL @ 10345985554 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
UVM_INFO @ 10345985554 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1236) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
i2c_host_stress_all_with_rand_reset 12017855043892836939904784218899627765122725616485217578533503962929828919720 84
UVM_ERROR @ 152322182 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 152322182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
i2c_target_stress_all_with_rand_reset 86258389761387181554845291104433284485016784475522936419081262178163312939619 84
UVM_ERROR @ 241053413 ps: (cip_base_vseq.sv:1236) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 241053413 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared:
i2c_host_mode_toggle 85912049216580064312229648924532176905741317469113706222597007827402606957746 85
UVM_ERROR @ 907521814 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
----------------------------------------------------
Name Type Size Value
----------------------------------------------------
mon_dut_item i2c_item - @21771