| V1 |
|
100.00% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| alert_handler_smoke | 31.930s | 897.697us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.460s | 40.471us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| alert_handler_csr_rw | 3.830s | 259.295us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| alert_handler_csr_bit_bash | 161.440s | 15278.464us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| alert_handler_csr_aliasing | 174.030s | 4372.924us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| alert_handler_csr_mem_rw_with_rand_reset | 6.190s | 557.571us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| alert_handler_csr_rw | 3.830s | 259.295us | 1 | 1 | 100.00 | |
| alert_handler_csr_aliasing | 174.030s | 4372.924us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| esc_accum | 1 | 1 | 100.00 | |||
| alert_handler_esc_alert_accum | 50.870s | 948.540us | 1 | 1 | 100.00 | |
| esc_timeout | 1 | 1 | 100.00 | |||
| alert_handler_esc_intr_timeout | 23.380s | 1054.460us | 1 | 1 | 100.00 | |
| entropy | 1 | 1 | 100.00 | |||
| alert_handler_entropy | 425.170s | 7575.954us | 1 | 1 | 100.00 | |
| sig_int_fail | 1 | 1 | 100.00 | |||
| alert_handler_sig_int_fail | 28.630s | 2058.414us | 1 | 1 | 100.00 | |
| clk_skew | 1 | 1 | 100.00 | |||
| alert_handler_smoke | 31.930s | 897.697us | 1 | 1 | 100.00 | |
| random_alerts | 1 | 1 | 100.00 | |||
| alert_handler_random_alerts | 40.840s | 1241.194us | 1 | 1 | 100.00 | |
| random_classes | 1 | 1 | 100.00 | |||
| alert_handler_random_classes | 34.130s | 3704.583us | 1 | 1 | 100.00 | |
| ping_timeout | 1 | 1 | 100.00 | |||
| alert_handler_ping_timeout | 92.660s | 3563.845us | 1 | 1 | 100.00 | |
| lpg | 2 | 2 | 100.00 | |||
| alert_handler_lpg | 682.880s | 47878.741us | 1 | 1 | 100.00 | |
| alert_handler_lpg_stub_clk | 1417.620s | 76307.312us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| alert_handler_stress_all | 49.860s | 4094.659us | 1 | 1 | 100.00 | |
| alert_handler_entropy_stress_test | 1 | 1 | 100.00 | |||
| alert_handler_entropy_stress | 19.540s | 1345.769us | 1 | 1 | 100.00 | |
| alert_handler_alert_accum_saturation | 1 | 1 | 100.00 | |||
| alert_handler_alert_accum_saturation | 2.410s | 58.021us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| alert_handler_intr_test | 1.310s | 8.215us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| alert_handler_tl_errors | 6.620s | 517.012us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| alert_handler_tl_errors | 6.620s | 517.012us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.460s | 40.471us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 3.830s | 259.295us | 1 | 1 | 100.00 | |
| alert_handler_csr_aliasing | 174.030s | 4372.924us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 13.140s | 513.376us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| alert_handler_csr_hw_reset | 4.460s | 40.471us | 1 | 1 | 100.00 | |
| alert_handler_csr_rw | 3.830s | 259.295us | 1 | 1 | 100.00 | |
| alert_handler_csr_aliasing | 174.030s | 4372.924us | 1 | 1 | 100.00 | |
| alert_handler_same_csr_outstanding | 13.140s | 513.376us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| shadow_reg_update_error | 1 | 1 | 100.00 | |||
| alert_handler_shadow_reg_errors | 229.040s | 13002.933us | 1 | 1 | 100.00 | |
| shadow_reg_read_clear_staged_value | 1 | 1 | 100.00 | |||
| alert_handler_shadow_reg_errors | 229.040s | 13002.933us | 1 | 1 | 100.00 | |
| shadow_reg_storage_error | 1 | 1 | 100.00 | |||
| alert_handler_shadow_reg_errors | 229.040s | 13002.933us | 1 | 1 | 100.00 | |
| shadowed_reset_glitch | 1 | 1 | 100.00 | |||
| alert_handler_shadow_reg_errors | 229.040s | 13002.933us | 1 | 1 | 100.00 | |
| shadow_reg_update_error_with_csr_rw | 1 | 1 | 100.00 | |||
| alert_handler_shadow_reg_errors_with_csr_rw | 643.140s | 51691.664us | 1 | 1 | 100.00 | |
| tl_intg_err | 2 | 2 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| alert_handler_tl_intg_err | 3.230s | 188.646us | 1 | 1 | 100.00 | |
| sec_cm_bus_integrity | 1 | 1 | 100.00 | |||
| alert_handler_tl_intg_err | 3.230s | 188.646us | 1 | 1 | 100.00 | |
| sec_cm_config_shadow | 1 | 1 | 100.00 | |||
| alert_handler_shadow_reg_errors | 229.040s | 13002.933us | 1 | 1 | 100.00 | |
| sec_cm_ping_timer_config_regwen | 1 | 1 | 100.00 | |||
| alert_handler_smoke | 31.930s | 897.697us | 1 | 1 | 100.00 | |
| sec_cm_alert_config_regwen | 1 | 1 | 100.00 | |||
| alert_handler_smoke | 31.930s | 897.697us | 1 | 1 | 100.00 | |
| sec_cm_alert_loc_config_regwen | 1 | 1 | 100.00 | |||
| alert_handler_smoke | 31.930s | 897.697us | 1 | 1 | 100.00 | |
| sec_cm_class_config_regwen | 1 | 1 | 100.00 | |||
| alert_handler_smoke | 31.930s | 897.697us | 1 | 1 | 100.00 | |
| sec_cm_alert_intersig_diff | 1 | 1 | 100.00 | |||
| alert_handler_sig_int_fail | 28.630s | 2058.414us | 1 | 1 | 100.00 | |
| sec_cm_lpg_intersig_mubi | 1 | 1 | 100.00 | |||
| alert_handler_lpg | 682.880s | 47878.741us | 1 | 1 | 100.00 | |
| sec_cm_esc_intersig_diff | 1 | 1 | 100.00 | |||
| alert_handler_sig_int_fail | 28.630s | 2058.414us | 1 | 1 | 100.00 | |
| sec_cm_alert_rx_intersig_bkgn_chk | 1 | 1 | 100.00 | |||
| alert_handler_entropy | 425.170s | 7575.954us | 1 | 1 | 100.00 | |
| sec_cm_esc_tx_intersig_bkgn_chk | 1 | 1 | 100.00 | |||
| alert_handler_entropy | 425.170s | 7575.954us | 1 | 1 | 100.00 | |
| sec_cm_esc_timer_fsm_sparse | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| sec_cm_ping_timer_fsm_sparse | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| sec_cm_esc_timer_fsm_local_esc | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| sec_cm_ping_timer_fsm_local_esc | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| sec_cm_esc_timer_fsm_global_esc | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| sec_cm_accu_ctr_redun | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| sec_cm_esc_timer_ctr_redun | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| sec_cm_ping_timer_ctr_redun | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| sec_cm_ping_timer_lfsr_redun | 1 | 1 | 100.00 | |||
| alert_handler_sec_cm | 8.230s | 420.640us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| stress_all_with_rand_reset | 1 | 1 | 100.00 | |||
| alert_handler_stress_all_with_rand_reset | 59.220s | 1415.181us | 1 | 1 | 100.00 | |