Simulation Results: aes/masked

 
06/04/2026 19:24:38 DVSim: v1.17.3 sha: d2f24af json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.06 %
  • code
  • 95.62 %
  • assert
  • 98.29 %
  • func
  • 67.28 %
  • block
  • 95.77 %
  • line
  • 97.51 %
  • branch
  • 89.48 %
  • toggle
  • 98.05 %
  • FSM
  • 97.42 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 114.619us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 67.336us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 1.000s 207.641us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 109.880us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 5.000s 244.348us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 4.000s 421.399us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 67.577us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 109.880us 1 1 100.00
aes_csr_aliasing 4.000s 421.399us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 67.336us 1 1 100.00
aes_config_error 4.000s 95.355us 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 67.336us 1 1 100.00
aes_config_error 4.000s 95.355us 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
back2back 2 2 100.00
aes_stress 3.000s 75.906us 1 1 100.00
aes_b2b 6.000s 371.351us 1 1 100.00
backpressure 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 2.000s 67.336us 1 1 100.00
aes_config_error 4.000s 95.355us 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
aes_alert_reset 5.000s 269.863us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 70.813us 1 1 100.00
aes_config_error 4.000s 95.355us 1 1 100.00
aes_alert_reset 5.000s 269.863us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 4.000s 188.122us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 9.000s 193.410us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 13.000s 1961.285us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 5.000s 269.863us 1 1 100.00
stress 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
sideload 2 2 100.00
aes_stress 3.000s 75.906us 1 1 100.00
aes_sideload 2.000s 104.402us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 87.947us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 5.000s 309.796us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 2.000s 111.175us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 52.904us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 122.758us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 122.758us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 1.000s 207.641us 1 1 100.00
aes_csr_rw 1.000s 109.880us 1 1 100.00
aes_csr_aliasing 4.000s 421.399us 1 1 100.00
aes_same_csr_outstanding 3.000s 1049.812us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 1.000s 207.641us 1 1 100.00
aes_csr_rw 1.000s 109.880us 1 1 100.00
aes_csr_aliasing 4.000s 421.399us 1 1 100.00
aes_same_csr_outstanding 3.000s 1049.812us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 6.000s 306.229us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_cipher_fi 2.000s 55.819us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 3.000s 140.139us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 3.000s 140.139us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 3.000s 140.139us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 3.000s 140.139us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 250.866us 1 1 100.00
tl_intg_err 2 2 100.00
aes_tl_intg_err 3.000s 713.644us 1 1 100.00
aes_sec_cm 6.000s 541.071us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 3.000s 713.644us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 5.000s 269.863us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 140.139us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 140.139us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 2.000s 67.336us 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
aes_alert_reset 5.000s 269.863us 1 1 100.00
aes_core_fi 4.000s 130.841us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 2.000s 111.175us 1 1 100.00
aes_config_error 4.000s 95.355us 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
aes_core_fi 4.000s 130.841us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 140.139us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 3.000s 82.300us 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 3.000s 75.906us 1 1 100.00
aes_sideload 2.000s 104.402us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 3.000s 82.300us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 3.000s 82.300us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 3.000s 82.300us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 3.000s 82.300us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 3.000s 82.300us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 3.000s 75.906us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_cipher_fi 2.000s 55.819us 1 1 100.00
aes_ctr_fi 2.000s 77.957us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_cipher_fi 2.000s 55.819us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 55.819us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_ctr_fi 2.000s 77.957us 1 1 100.00
sec_cm_ghash_fsm_sparse 1 1 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_cipher_fi 2.000s 55.819us 1 1 100.00
aes_ctr_fi 2.000s 77.957us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 5.000s 269.863us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_cipher_fi 2.000s 55.819us 1 1 100.00
aes_ctr_fi 2.000s 77.957us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_cipher_fi 2.000s 55.819us 1 1 100.00
aes_ctr_fi 2.000s 77.957us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_ctr_fi 2.000s 77.957us 1 1 100.00
sec_cm_ghash_fsm_local_esc 2 2 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_ghash_fi 2.000s 59.387us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 21.000s 4800.810us 1 1 100.00
aes_control_fi 2.000s 85.156us 1 1 100.00
aes_cipher_fi 2.000s 55.819us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 17.000s 690.698us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 45106029227352831880741208215068615929000041772254249607313459620195970221439 638
UVM_ERROR @ 690697581 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 690697581 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---