Simulation Results: keymgr

 
07/04/2026 19:25:09 DVSim: v1.17.3 sha: f66d746 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.01 %
  • code
  • 96.33 %
  • assert
  • 97.72 %
  • func
  • 63.97 %
  • line
  • 98.92 %
  • branch
  • 97.99 %
  • cond
  • 94.40 %
  • toggle
  • 97.31 %
  • FSM
  • 93.02 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 2.070s 474.309us 1 1 100.00
random 1 1 100.00
keymgr_random 4.330s 309.868us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.220s 51.729us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.300s 51.399us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 10.450s 865.477us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 10.650s 1436.682us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.640s 118.288us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.300s 51.399us 1 1 100.00
keymgr_csr_aliasing 10.650s 1436.682us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.770s 60.336us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 6.050s 921.475us 1 1 100.00
keymgr_sideload_kmac 38.790s 5565.954us 1 1 100.00
keymgr_sideload_aes 4.430s 3072.147us 1 1 100.00
keymgr_sideload_otbn 15.830s 1445.048us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 3.100s 797.982us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.860s 84.639us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 4.060s 104.248us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 11.680s 1189.616us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 3.080s 196.941us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 3.850s 266.732us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 13.920s 2308.225us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.900s 15.083us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.940s 11.928us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 3.880s 553.178us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 3.880s 553.178us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.220s 51.729us 1 1 100.00
keymgr_csr_rw 1.300s 51.399us 1 1 100.00
keymgr_csr_aliasing 10.650s 1436.682us 1 1 100.00
keymgr_same_csr_outstanding 1.690s 50.935us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.220s 51.729us 1 1 100.00
keymgr_csr_rw 1.300s 51.399us 1 1 100.00
keymgr_csr_aliasing 10.650s 1436.682us 1 1 100.00
keymgr_same_csr_outstanding 1.690s 50.935us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_tl_intg_err 5.320s 253.003us 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.700s 465.672us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.700s 465.672us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.700s 465.672us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.700s 465.672us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 6.300s 276.857us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 5.320s 253.003us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.700s 465.672us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.770s 60.336us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_csr_rw 1.300s 51.399us 1 1 100.00
keymgr_random 4.330s 309.868us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_csr_rw 1.300s 51.399us 1 1 100.00
keymgr_random 4.330s 309.868us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_csr_rw 1.300s 51.399us 1 1 100.00
keymgr_random 4.330s 309.868us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.860s 84.639us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.080s 196.941us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.080s 196.941us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 4.330s 309.868us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 12.900s 9927.381us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 6.270s 1823.007us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.860s 84.639us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 6.270s 1823.007us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 6.270s 1823.007us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 6.270s 1823.007us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 3.800s 242.266us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 6.270s 1823.007us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 9.410s 213.123us 1 1 100.00