Simulation Results: keymgr

 
08/04/2026 18:06:49 DVSim: v1.17.3 sha: 007b0cf json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 84.81 %
  • code
  • 93.68 %
  • assert
  • 97.49 %
  • func
  • 63.26 %
  • line
  • 98.72 %
  • branch
  • 97.44 %
  • cond
  • 93.08 %
  • toggle
  • 93.10 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 2.160s 904.557us 1 1 100.00
random 1 1 100.00
keymgr_random 2.730s 284.232us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.810s 24.381us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.000s 25.857us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 5.670s 2679.998us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 2.750s 238.003us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.150s 82.415us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.000s 25.857us 1 1 100.00
keymgr_csr_aliasing 2.750s 238.003us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 5.670s 157.860us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 3.450s 196.585us 1 1 100.00
keymgr_sideload_kmac 2.090s 234.756us 1 1 100.00
keymgr_sideload_aes 3.300s 287.589us 1 1 100.00
keymgr_sideload_otbn 2.780s 94.319us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 3.000s 295.386us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.040s 196.221us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.480s 166.959us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.540s 130.688us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.660s 295.568us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.710s 44.353us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 111.430s 5533.664us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.640s 12.118us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.920s 15.027us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.040s 135.554us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.040s 135.554us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.810s 24.381us 1 1 100.00
keymgr_csr_rw 1.000s 25.857us 1 1 100.00
keymgr_csr_aliasing 2.750s 238.003us 1 1 100.00
keymgr_same_csr_outstanding 2.710s 105.295us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.810s 24.381us 1 1 100.00
keymgr_csr_rw 1.000s 25.857us 1 1 100.00
keymgr_csr_aliasing 2.750s 238.003us 1 1 100.00
keymgr_same_csr_outstanding 2.710s 105.295us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_tl_intg_err 2.540s 224.513us 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.810s 109.979us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.810s 109.979us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.810s 109.979us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.810s 109.979us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 10.810s 1785.397us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 2.540s 224.513us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.810s 109.979us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 5.670s 157.860us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_csr_rw 1.000s 25.857us 1 1 100.00
keymgr_random 2.730s 284.232us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_csr_rw 1.000s 25.857us 1 1 100.00
keymgr_random 2.730s 284.232us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_csr_rw 1.000s 25.857us 1 1 100.00
keymgr_random 2.730s 284.232us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.040s 196.221us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.660s 295.568us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.660s 295.568us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 2.730s 284.232us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 3.060s 674.132us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 3.810s 219.415us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.040s 196.221us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.810s 219.415us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.810s 219.415us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.810s 219.415us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 12.650s 893.075us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 3.810s 219.415us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 6.370s 140.335us 1 1 100.00