Simulation Results: aes/masked

 
13/04/2026 19:14:24 DVSim: v1.30.1 sha: 4ae05e3 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.13 %
  • code
  • 95.75 %
  • assert
  • 98.29 %
  • func
  • 70.34 %
  • block
  • 96.40 %
  • line
  • 97.55 %
  • branch
  • 91.27 %
  • toggle
  • 98.05 %
  • FSM
  • 96.13 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 69.558us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 62.451us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 68.984us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 89.014us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 5.000s 323.395us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 120.596us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 62.966us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 89.014us 1 1 100.00
aes_csr_aliasing 3.000s 120.596us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 62.451us 1 1 100.00
aes_config_error 4.000s 196.299us 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 62.451us 1 1 100.00
aes_config_error 4.000s 196.299us 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
back2back 2 2 100.00
aes_stress 5.000s 518.769us 1 1 100.00
aes_b2b 5.000s 97.945us 1 1 100.00
backpressure 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 2.000s 62.451us 1 1 100.00
aes_config_error 4.000s 196.299us 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
aes_alert_reset 23.000s 1525.298us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 91.868us 1 1 100.00
aes_config_error 4.000s 196.299us 1 1 100.00
aes_alert_reset 23.000s 1525.298us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 6.000s 1555.650us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 10.000s 388.800us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 9.000s 189.706us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 23.000s 1525.298us 1 1 100.00
stress 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
sideload 2 2 100.00
aes_stress 5.000s 518.769us 1 1 100.00
aes_sideload 6.000s 122.037us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 20.000s 1817.690us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 35.000s 2290.429us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 4.000s 130.286us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 3.000s 80.309us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 300.218us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 300.218us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 68.984us 1 1 100.00
aes_csr_rw 2.000s 89.014us 1 1 100.00
aes_csr_aliasing 3.000s 120.596us 1 1 100.00
aes_same_csr_outstanding 2.000s 86.194us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 68.984us 1 1 100.00
aes_csr_rw 2.000s 89.014us 1 1 100.00
aes_csr_aliasing 3.000s 120.596us 1 1 100.00
aes_same_csr_outstanding 2.000s 86.194us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 4.000s 215.599us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_cipher_fi 3.000s 50.208us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 1.000s 90.101us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 1.000s 90.101us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 1.000s 90.101us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 1.000s 90.101us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 117.328us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 8.000s 1439.017us 1 1 100.00
aes_tl_intg_err 2.000s 189.885us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 189.885us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 23.000s 1525.298us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 90.101us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 90.101us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 2.000s 62.451us 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
aes_alert_reset 23.000s 1525.298us 1 1 100.00
aes_core_fi 2.000s 133.291us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 4.000s 130.286us 1 1 100.00
aes_config_error 4.000s 196.299us 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
aes_core_fi 2.000s 133.291us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 1.000s 90.101us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 67.023us 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 5.000s 518.769us 1 1 100.00
aes_sideload 6.000s 122.037us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 67.023us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 67.023us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 67.023us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 67.023us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 67.023us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 5.000s 518.769us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 3.000s 331.353us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_cipher_fi 3.000s 50.208us 1 1 100.00
aes_ctr_fi 3.000s 72.173us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 3.000s 331.353us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_cipher_fi 3.000s 50.208us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 3.000s 50.208us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 3.000s 331.353us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_ctr_fi 3.000s 72.173us 1 1 100.00
sec_cm_ghash_fsm_sparse 1 1 100.00
aes_fi 3.000s 331.353us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_cipher_fi 3.000s 50.208us 1 1 100.00
aes_ctr_fi 3.000s 72.173us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 23.000s 1525.298us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_cipher_fi 3.000s 50.208us 1 1 100.00
aes_ctr_fi 3.000s 72.173us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_cipher_fi 3.000s 50.208us 1 1 100.00
aes_ctr_fi 3.000s 72.173us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_ctr_fi 3.000s 72.173us 1 1 100.00
sec_cm_ghash_fsm_local_esc 2 2 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_ghash_fi 2.000s 52.319us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 3.000s 331.353us 1 1 100.00
aes_control_fi 2.000s 87.848us 1 1 100.00
aes_cipher_fi 3.000s 50.208us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 5.000s 34.753us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 61117892233656911372386587156388802819598448541038216867227955317880829916755 189
UVM_INFO @ 34753383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---