Simulation Results: alert_handler

 
13/04/2026 19:14:24 DVSim: v1.30.1 sha: 4ae05e3 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 89.94 %
  • code
  • 92.48 %
  • assert
  • 98.42 %
  • func
  • 78.93 %
  • line
  • 99.69 %
  • branch
  • 97.92 %
  • cond
  • 91.44 %
  • toggle
  • 94.30 %
  • FSM
  • 79.03 %
Validation stages
V1
100.00%
V2
94.74%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
alert_handler_smoke 22.380s 656.825us 1 1 100.00
csr_hw_reset 1 1 100.00
alert_handler_csr_hw_reset 5.660s 231.108us 1 1 100.00
csr_rw 1 1 100.00
alert_handler_csr_rw 3.380s 122.153us 1 1 100.00
csr_bit_bash 1 1 100.00
alert_handler_csr_bit_bash 109.060s 2853.372us 1 1 100.00
csr_aliasing 1 1 100.00
alert_handler_csr_aliasing 149.680s 7716.738us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
alert_handler_csr_mem_rw_with_rand_reset 4.700s 357.353us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
alert_handler_csr_rw 3.380s 122.153us 1 1 100.00
alert_handler_csr_aliasing 149.680s 7716.738us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 1 1 100.00
alert_handler_esc_alert_accum 85.840s 4967.673us 1 1 100.00
esc_timeout 1 1 100.00
alert_handler_esc_intr_timeout 8.140s 468.791us 1 1 100.00
entropy 1 1 100.00
alert_handler_entropy 1793.440s 178260.960us 1 1 100.00
sig_int_fail 1 1 100.00
alert_handler_sig_int_fail 38.180s 1644.199us 1 1 100.00
clk_skew 1 1 100.00
alert_handler_smoke 22.380s 656.825us 1 1 100.00
random_alerts 1 1 100.00
alert_handler_random_alerts 14.920s 392.276us 1 1 100.00
random_classes 1 1 100.00
alert_handler_random_classes 22.400s 595.568us 1 1 100.00
ping_timeout 0 1 0.00
alert_handler_ping_timeout 103.880s 4623.312us 0 1 0.00
lpg 2 2 100.00
alert_handler_lpg 703.810s 12838.928us 1 1 100.00
alert_handler_lpg_stub_clk 447.110s 20979.406us 1 1 100.00
stress_all 1 1 100.00
alert_handler_stress_all 844.180s 18155.762us 1 1 100.00
alert_handler_entropy_stress_test 1 1 100.00
alert_handler_entropy_stress 17.640s 420.402us 1 1 100.00
alert_handler_alert_accum_saturation 1 1 100.00
alert_handler_alert_accum_saturation 1.910s 42.862us 1 1 100.00
intr_test 1 1 100.00
alert_handler_intr_test 1.220s 6.250us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
alert_handler_tl_errors 11.970s 714.086us 1 1 100.00
tl_d_illegal_access 1 1 100.00
alert_handler_tl_errors 11.970s 714.086us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
alert_handler_csr_hw_reset 5.660s 231.108us 1 1 100.00
alert_handler_csr_rw 3.380s 122.153us 1 1 100.00
alert_handler_csr_aliasing 149.680s 7716.738us 1 1 100.00
alert_handler_same_csr_outstanding 29.320s 746.149us 1 1 100.00
tl_d_partial_access 4 4 100.00
alert_handler_csr_hw_reset 5.660s 231.108us 1 1 100.00
alert_handler_csr_rw 3.380s 122.153us 1 1 100.00
alert_handler_csr_aliasing 149.680s 7716.738us 1 1 100.00
alert_handler_same_csr_outstanding 29.320s 746.149us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
alert_handler_shadow_reg_errors 68.950s 1152.956us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
alert_handler_shadow_reg_errors 68.950s 1152.956us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
alert_handler_shadow_reg_errors 68.950s 1152.956us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
alert_handler_shadow_reg_errors 68.950s 1152.956us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
alert_handler_shadow_reg_errors_with_csr_rw 180.650s 8887.299us 1 1 100.00
tl_intg_err 2 2 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
alert_handler_tl_intg_err 2.170s 30.315us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
alert_handler_tl_intg_err 2.170s 30.315us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
alert_handler_shadow_reg_errors 68.950s 1152.956us 1 1 100.00
sec_cm_ping_timer_config_regwen 1 1 100.00
alert_handler_smoke 22.380s 656.825us 1 1 100.00
sec_cm_alert_config_regwen 1 1 100.00
alert_handler_smoke 22.380s 656.825us 1 1 100.00
sec_cm_alert_loc_config_regwen 1 1 100.00
alert_handler_smoke 22.380s 656.825us 1 1 100.00
sec_cm_class_config_regwen 1 1 100.00
alert_handler_smoke 22.380s 656.825us 1 1 100.00
sec_cm_alert_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 38.180s 1644.199us 1 1 100.00
sec_cm_lpg_intersig_mubi 1 1 100.00
alert_handler_lpg 703.810s 12838.928us 1 1 100.00
sec_cm_esc_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 38.180s 1644.199us 1 1 100.00
sec_cm_alert_rx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 1793.440s 178260.960us 1 1 100.00
sec_cm_esc_tx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 1793.440s 178260.960us 1 1 100.00
sec_cm_esc_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
sec_cm_ping_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
sec_cm_esc_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
sec_cm_ping_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
sec_cm_esc_timer_fsm_global_esc 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
sec_cm_accu_ctr_redun 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
sec_cm_esc_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
sec_cm_ping_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
sec_cm_ping_timer_lfsr_redun 1 1 100.00
alert_handler_sec_cm 9.620s 463.467us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
alert_handler_stress_all_with_rand_reset 160.410s 2377.763us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state
alert_handler_ping_timeout 52707245237781682624740678361638153169156552841947236957431124060683650852416 117
UVM_INFO @ 4623311556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---