Simulation Results: entropy_src/rng_4bits

 
13/04/2026 19:14:24 DVSim: v1.30.1 sha: 4ae05e3 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 73.90 %
  • code
  • 88.26 %
  • assert
  • 83.09 %
  • func
  • 50.34 %
  • block
  • 94.66 %
  • line
  • 97.34 %
  • branch
  • 86.85 %
  • toggle
  • 76.15 %
  • FSM
  • 92.71 %
Validation stages
V1
100.00%
V2
93.75%
V2S
85.71%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 33.771us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 23.359us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 208.630us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 4.000s 660.069us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 3.000s 73.019us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 109.182us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 208.630us 1 1 100.00
entropy_src_csr_aliasing 3.000s 73.019us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 2 3 66.67
entropy_src_smoke 2.000s 33.771us 1 1 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
entropy_src_fw_ov 95.000s 5352.153us 0 1 0.00
firmware_mode 0 1 0.00
entropy_src_fw_ov 95.000s 5352.153us 0 1 0.00
rng_mode 1 1 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 157.000s 20141.712us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
entropy_src_intr 8.000s 4146.051us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
entropy_src_functional_alerts 4.000s 182.667us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 52.000s 13895.149us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 149.143us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 3.000s 516.174us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 24.731us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 60.435us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 2.000s 52.769us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 2.000s 52.769us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 23.359us 1 1 100.00
entropy_src_csr_rw 2.000s 208.630us 1 1 100.00
entropy_src_csr_aliasing 3.000s 73.019us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 499.289us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 23.359us 1 1 100.00
entropy_src_csr_rw 2.000s 208.630us 1 1 100.00
entropy_src_csr_aliasing 3.000s 73.019us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 499.289us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 102.554us 1 1 100.00
entropy_src_tl_intg_err 4.000s 359.330us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
entropy_src_cfg_regwen 2.000s 19.061us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
sec_cm_intersig_mubi 1 2 50.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
entropy_src_fw_ov 95.000s 5352.153us 0 1 0.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 149.143us 1 1 100.00
entropy_src_sec_cm 2.000s 102.554us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 149.143us 1 1 100.00
entropy_src_sec_cm 2.000s 102.554us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 54.000s 16286.232us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 149.143us 1 1 100.00
entropy_src_sec_cm 2.000s 102.554us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 149.143us 1 1 100.00
entropy_src_sec_cm 2.000s 102.554us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 149.143us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 4.000s 182.667us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 4.000s 359.330us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 55.000s 12044.687us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:354) scoreboard [scoreboard] alert recov_alert did not trigger max_delay:*
entropy_src_fw_ov 100872868944542227322416127725028503125194651159665321031509318047394676357440 964
UVM_INFO @ 5352152894 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---