Simulation Results: keymgr

 
13/04/2026 19:14:24 DVSim: v1.30.1 sha: 4ae05e3 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.55 %
  • code
  • 95.67 %
  • assert
  • 97.49 %
  • func
  • 66.50 %
  • line
  • 98.84 %
  • branch
  • 97.72 %
  • cond
  • 94.60 %
  • toggle
  • 96.48 %
  • FSM
  • 90.70 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 2.590s 108.755us 1 1 100.00
random 1 1 100.00
keymgr_random 3.270s 327.626us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.990s 27.887us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.400s 85.993us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 8.190s 259.942us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 3.580s 154.109us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 2.310s 49.769us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.400s 85.993us 1 1 100.00
keymgr_csr_aliasing 3.580s 154.109us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 3.360s 87.316us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.100s 52.978us 1 1 100.00
keymgr_sideload_kmac 2.790s 291.991us 1 1 100.00
keymgr_sideload_aes 1.870s 137.910us 1 1 100.00
keymgr_sideload_otbn 2.560s 106.717us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 12.220s 534.358us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.920s 131.368us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.540s 69.020us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 13.940s 3029.534us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 12.920s 626.591us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 2.710s 1959.505us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 7.480s 334.258us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.990s 14.412us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.880s 202.473us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 3.550s 145.759us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 3.550s 145.759us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.990s 27.887us 1 1 100.00
keymgr_csr_rw 1.400s 85.993us 1 1 100.00
keymgr_csr_aliasing 3.580s 154.109us 1 1 100.00
keymgr_same_csr_outstanding 1.780s 153.123us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.990s 27.887us 1 1 100.00
keymgr_csr_rw 1.400s 85.993us 1 1 100.00
keymgr_csr_aliasing 3.580s 154.109us 1 1 100.00
keymgr_same_csr_outstanding 1.780s 153.123us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
keymgr_tl_intg_err 3.960s 331.694us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 3.420s 149.161us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 3.420s 149.161us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 3.420s 149.161us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 3.420s 149.161us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 7.190s 404.149us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.960s 331.694us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 3.420s 149.161us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 3.360s 87.316us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 3.270s 327.626us 1 1 100.00
keymgr_csr_rw 1.400s 85.993us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 3.270s 327.626us 1 1 100.00
keymgr_csr_rw 1.400s 85.993us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 3.270s 327.626us 1 1 100.00
keymgr_csr_rw 1.400s 85.993us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.920s 131.368us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 12.920s 626.591us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 12.920s 626.591us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 3.270s 327.626us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.030s 900.312us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 3.720s 482.946us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.920s 131.368us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.720s 482.946us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.720s 482.946us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.720s 482.946us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.630s 502.786us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 3.720s 482.946us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 10.450s 236.327us 1 1 100.00