Simulation Results: aes/masked

 
14/04/2026 16:33:31 DVSim: v1.30.1 sha: 7caff13 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 87.64 %
  • code
  • 95.07 %
  • assert
  • 98.29 %
  • func
  • 69.57 %
  • block
  • 95.72 %
  • line
  • 97.43 %
  • branch
  • 89.40 %
  • toggle
  • 97.96 %
  • FSM
  • 95.48 %
Validation stages
V1
100.00%
V2
100.00%
V2S
94.44%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 138.244us 1 1 100.00
smoke 1 1 100.00
aes_smoke 4.000s 170.512us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 73.024us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 88.311us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 8.000s 2319.749us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 591.336us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 107.713us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 88.311us 1 1 100.00
aes_csr_aliasing 3.000s 591.336us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 4.000s 170.512us 1 1 100.00
aes_config_error 3.000s 379.967us 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
key_length 3 3 100.00
aes_smoke 4.000s 170.512us 1 1 100.00
aes_config_error 3.000s 379.967us 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 67.556us 1 1 100.00
aes_b2b 10.000s 514.175us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 4.000s 170.512us 1 1 100.00
aes_config_error 3.000s 379.967us 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
aes_alert_reset 4.000s 274.007us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 3.000s 57.467us 1 1 100.00
aes_config_error 3.000s 379.967us 1 1 100.00
aes_alert_reset 4.000s 274.007us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 74.325us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 7.000s 1389.930us 1 1 100.00
nist_test_vectors_gcm 1 1 100.00
aes_nist_vectors_gcm 7.000s 575.404us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 4.000s 274.007us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 67.556us 1 1 100.00
aes_sideload 3.000s 402.682us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 4.000s 120.495us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 85.000s 5974.214us 1 1 100.00
gcm_save_and_restore 1 1 100.00
aes_gcm_save_restore 3.000s 113.791us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 139.998us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 223.065us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 223.065us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 73.024us 1 1 100.00
aes_csr_rw 1.000s 88.311us 1 1 100.00
aes_csr_aliasing 3.000s 591.336us 1 1 100.00
aes_same_csr_outstanding 2.000s 266.195us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 73.024us 1 1 100.00
aes_csr_rw 1.000s 88.311us 1 1 100.00
aes_csr_aliasing 3.000s 591.336us 1 1 100.00
aes_same_csr_outstanding 2.000s 266.195us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 5.000s 273.974us 1 1 100.00
fault_inject 2 3 66.67
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_cipher_fi 1.000s 92.671us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 70.552us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 70.552us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 70.552us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 70.552us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 494.529us 1 1 100.00
tl_intg_err 2 2 100.00
aes_sec_cm 6.000s 1623.454us 1 1 100.00
aes_tl_intg_err 3.000s 216.877us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 3.000s 216.877us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 4.000s 274.007us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 70.552us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 70.552us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 4.000s 170.512us 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
aes_alert_reset 4.000s 274.007us 1 1 100.00
aes_core_fi 3.000s 439.160us 1 1 100.00
sec_cm_gcm_config_sparse 4 4 100.00
aes_gcm_save_restore 3.000s 113.791us 1 1 100.00
aes_config_error 3.000s 379.967us 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
aes_core_fi 3.000s 439.160us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 70.552us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 115.966us 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 67.556us 1 1 100.00
aes_sideload 3.000s 402.682us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 115.966us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 115.966us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 115.966us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 115.966us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 115.966us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 67.556us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 3.000s 430.184us 1 1 100.00
sec_cm_main_fsm_redun 3 4 75.00
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_cipher_fi 1.000s 92.671us 1 1 100.00
aes_ctr_fi 2.000s 47.030us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 3.000s 430.184us 1 1 100.00
sec_cm_cipher_fsm_redun 2 3 66.67
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_cipher_fi 1.000s 92.671us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 1.000s 92.671us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 3.000s 430.184us 1 1 100.00
sec_cm_ctr_fsm_redun 2 3 66.67
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_ctr_fi 2.000s 47.030us 1 1 100.00
sec_cm_ghash_fsm_sparse 1 1 100.00
aes_fi 3.000s 430.184us 1 1 100.00
sec_cm_ctrl_sparse 3 4 75.00
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_cipher_fi 1.000s 92.671us 1 1 100.00
aes_ctr_fi 2.000s 47.030us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 4.000s 274.007us 1 1 100.00
sec_cm_main_fsm_local_esc 3 4 75.00
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_cipher_fi 1.000s 92.671us 1 1 100.00
aes_ctr_fi 2.000s 47.030us 1 1 100.00
sec_cm_cipher_fsm_local_esc 3 4 75.00
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_cipher_fi 1.000s 92.671us 1 1 100.00
aes_ctr_fi 2.000s 47.030us 1 1 100.00
sec_cm_ctr_fsm_local_esc 2 3 66.67
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_ctr_fi 2.000s 47.030us 1 1 100.00
sec_cm_ghash_fsm_local_esc 2 2 100.00
aes_fi 3.000s 430.184us 1 1 100.00
aes_ghash_fi 2.000s 86.977us 1 1 100.00
sec_cm_data_reg_local_esc 2 3 66.67
aes_fi 3.000s 430.184us 1 1 100.00
aes_control_fi 0.000s 0.000us 0 1 0.00
aes_cipher_fi 1.000s 92.671us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 32.000s 2274.322us 0 1 0.00

Error Messages

   Test seed line log context
Job killed!
aes_control_fi 113583298393657106748162351635949821096991572909368146237207733950466296449940 None
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 35531176268850077361044791525321860658552937296653318498249977519322881866163 924
UVM_INFO @ 2274322167 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---