Simulation Results: pwrmgr

 
14/04/2026 16:33:31 DVSim: v1.30.1 sha: 7caff13 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.94 %
  • code
  • 94.61 %
  • assert
  • 96.34 %
  • func
  • 96.87 %
  • line
  • 98.92 %
  • branch
  • 95.61 %
  • cond
  • 94.48 %
  • toggle
  • 90.02 %
  • FSM
  • 94.00 %
Validation stages
V1
100.00%
V2
100.00%
V2S
80.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
pwrmgr_smoke 0.670s 33.126us 1 1 100.00
csr_hw_reset 1 1 100.00
pwrmgr_csr_hw_reset 0.750s 67.373us 1 1 100.00
csr_rw 1 1 100.00
pwrmgr_csr_rw 0.610s 44.028us 1 1 100.00
csr_bit_bash 1 1 100.00
pwrmgr_csr_bit_bash 2.440s 219.164us 1 1 100.00
csr_aliasing 1 1 100.00
pwrmgr_csr_aliasing 0.930s 31.527us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
pwrmgr_csr_mem_rw_with_rand_reset 0.850s 74.726us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
pwrmgr_csr_rw 0.610s 44.028us 1 1 100.00
pwrmgr_csr_aliasing 0.930s 31.527us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
wakeup 1 1 100.00
pwrmgr_wakeup 0.670s 146.273us 1 1 100.00
control_clks 1 1 100.00
pwrmgr_wakeup 0.670s 146.273us 1 1 100.00
aborted_low_power 2 2 100.00
pwrmgr_aborted_low_power 0.740s 74.440us 1 1 100.00
pwrmgr_lowpower_invalid 0.830s 43.247us 1 1 100.00
reset 2 2 100.00
pwrmgr_reset 0.790s 92.282us 1 1 100.00
pwrmgr_reset_invalid 0.770s 156.452us 1 1 100.00
main_power_glitch_reset 1 1 100.00
pwrmgr_reset 0.790s 92.282us 1 1 100.00
reset_wakeup_race 1 1 100.00
pwrmgr_wakeup_reset 1.140s 327.703us 1 1 100.00
lowpower_wakeup_race 1 1 100.00
pwrmgr_lowpower_wakeup_race 0.950s 242.672us 1 1 100.00
disable_rom_integrity_check 1 1 100.00
pwrmgr_disable_rom_integrity_check 0.730s 86.199us 1 1 100.00
stress_all 1 1 100.00
pwrmgr_stress_all 1.990s 2444.366us 1 1 100.00
intr_test 1 1 100.00
pwrmgr_intr_test 0.710s 20.171us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
pwrmgr_tl_errors 1.370s 254.836us 1 1 100.00
tl_d_illegal_access 1 1 100.00
pwrmgr_tl_errors 1.370s 254.836us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
pwrmgr_csr_hw_reset 0.750s 67.373us 1 1 100.00
pwrmgr_csr_rw 0.610s 44.028us 1 1 100.00
pwrmgr_csr_aliasing 0.930s 31.527us 1 1 100.00
pwrmgr_same_csr_outstanding 0.700s 52.644us 1 1 100.00
tl_d_partial_access 4 4 100.00
pwrmgr_csr_hw_reset 0.750s 67.373us 1 1 100.00
pwrmgr_csr_rw 0.610s 44.028us 1 1 100.00
pwrmgr_csr_aliasing 0.930s 31.527us 1 1 100.00
pwrmgr_same_csr_outstanding 0.700s 52.644us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 0 2 0.00
pwrmgr_tl_intg_err 0.720s 6.997us 0 1 0.00
pwrmgr_sec_cm 0.710s 32.543us 0 1 0.00
prim_count_check 0 1 0.00
pwrmgr_sec_cm 0.710s 32.543us 0 1 0.00
prim_fsm_check 0 1 0.00
pwrmgr_sec_cm 0.710s 32.543us 0 1 0.00
sec_cm_bus_integrity 0 1 0.00
pwrmgr_tl_intg_err 0.720s 6.997us 0 1 0.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
pwrmgr_sec_cm_lc_ctrl_intersig_mubi 1.950s 899.710us 1 1 100.00
sec_cm_rom_ctrl_intersig_mubi 1 1 100.00
pwrmgr_wakeup_reset 1.140s 327.703us 1 1 100.00
sec_cm_rstmgr_intersig_mubi 1 1 100.00
pwrmgr_sec_cm_rstmgr_intersig_mubi 0.790s 61.174us 1 1 100.00
sec_cm_esc_rx_clk_bkgn_chk 1 1 100.00
pwrmgr_esc_clk_rst_malfunc 0.730s 28.316us 1 1 100.00
sec_cm_esc_rx_clk_local_esc 0 1 0.00
pwrmgr_sec_cm 0.710s 32.543us 0 1 0.00
sec_cm_fsm_sparse 0 1 0.00
pwrmgr_sec_cm 0.710s 32.543us 0 1 0.00
sec_cm_fsm_terminal 0 1 0.00
pwrmgr_sec_cm 0.710s 32.543us 0 1 0.00
sec_cm_ctrl_flow_global_esc 1 1 100.00
pwrmgr_global_esc 0.690s 52.361us 1 1 100.00
sec_cm_main_pd_rst_local_esc 1 1 100.00
pwrmgr_glitch 0.780s 57.251us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
pwrmgr_sec_cm_ctrl_config_regwen 1.290s 261.165us 1 1 100.00
sec_cm_wakeup_config_regwen 1 1 100.00
pwrmgr_csr_rw 0.610s 44.028us 1 1 100.00
sec_cm_reset_config_regwen 1 1 100.00
pwrmgr_csr_rw 0.610s 44.028us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
escalation_timeout 0 1 0.00
pwrmgr_escalation_timeout 0.970s 100.411us 0 1 0.00
stress_all_with_rand_reset 1 1 100.00
pwrmgr_stress_all_with_rand_reset 5.290s 1956.741us 1 1 100.00

Error Messages

   Test seed line log context
Offending '((!clk_en) || status)'
pwrmgr_escalation_timeout 50195378705377061993614789869121357473677551856557784222896840081385587529136 79
UVM_ERROR @ 100410734 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 100410734 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [pwrmgr_common_vseq] expect alert:fatal_fault to fire
pwrmgr_tl_intg_err 100549191090849198273752026467232812565255156371647382137532677335333560915387 82
UVM_INFO @ 6997401 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 31598007481890752025563768178052755885065689031286067248273458693483767368343 86
UVM_INFO @ 32543344 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---