Simulation Results: gpio

 
15/04/2026 16:33:45 DVSim: v1.30.1 sha: cf700e4 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.61 %
  • code
  • 96.00 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 98.93 %
  • branch
  • 99.01 %
  • cond
  • 97.84 %
  • toggle
  • 88.22 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.220s 84.133us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.170s 257.996us 1 1 100.00
gpio_smoke_en_cdc_prim 1.220s 49.729us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 0.890s 83.764us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.800s 52.657us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.890s 44.647us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.730s 85.141us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.820s 21.680us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.870s 86.338us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.890s 44.647us 1 1 100.00
gpio_csr_aliasing 0.820s 21.680us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.810s 22.556us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 0.990s 183.778us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.850s 13.203us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.120s 27.233us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.960s 195.061us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.630s 411.868us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 6.280s 166.904us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 1.470s 72.995us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.130s 62.117us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 2.150s 291.740us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.700s 12.168us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.710s 15.403us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 1.580s 87.615us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 1.580s 87.615us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.890s 44.647us 1 1 100.00
gpio_same_csr_outstanding 0.990s 70.611us 1 1 100.00
gpio_csr_aliasing 0.820s 21.680us 1 1 100.00
gpio_csr_hw_reset 0.800s 52.657us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.890s 44.647us 1 1 100.00
gpio_same_csr_outstanding 0.990s 70.611us 1 1 100.00
gpio_csr_aliasing 0.820s 21.680us 1 1 100.00
gpio_csr_hw_reset 0.800s 52.657us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.050s 78.425us 1 1 100.00
gpio_sec_cm 0.840s 67.528us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.050s 78.425us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 0 1 0.00
gpio_rand_straps 0.590s 0.868us 0 1 0.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 6.020s 533.484us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 69280854618486203926315748971517778474135035471746938872068112294423229151606 77
UVM_INFO @ 291740025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
gpio_rand_straps 17863905139507149582092886535764135397845601685692724823959671612502544741599 75
UVM_INFO @ 867899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 83790000974361093394916773840143964611209781307046208759877613157164904423497 228
UVM_INFO @ 533484418 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---