Simulation Results: entropy_src/rng_4bits

 
16/04/2026 00:05:37 DVSim: v1.30.1 sha: b849398 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 74.05 %
  • code
  • 89.14 %
  • assert
  • 82.43 %
  • func
  • 50.57 %
  • block
  • 94.77 %
  • line
  • 97.47 %
  • branch
  • 87.12 %
  • toggle
  • 76.15 %
  • FSM
  • 95.83 %
Validation stages
V1
100.00%
V2
93.75%
V2S
85.71%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 2.000s 22.343us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 2.000s 32.576us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 1.000s 30.527us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 10.000s 767.474us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 4.000s 203.453us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
entropy_src_csr_mem_rw_with_rand_reset 2.000s 54.022us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 1.000s 30.527us 1 1 100.00
entropy_src_csr_aliasing 4.000s 203.453us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 2 3 66.67
entropy_src_smoke 2.000s 22.343us 1 1 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
entropy_src_fw_ov 158.000s 8806.175us 0 1 0.00
firmware_mode 0 1 0.00
entropy_src_fw_ov 158.000s 8806.175us 0 1 0.00
rng_mode 1 1 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 396.000s 13029.141us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
entropy_src_intr 15.000s 1276.392us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
entropy_src_functional_alerts 4.000s 181.288us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 131.000s 18335.259us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 42.852us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 3.000s 54.293us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 13.269us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 1.000s 30.030us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 2.000s 34.274us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 2.000s 34.274us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 32.576us 1 1 100.00
entropy_src_csr_rw 1.000s 30.527us 1 1 100.00
entropy_src_csr_aliasing 4.000s 203.453us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 167.047us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 2.000s 32.576us 1 1 100.00
entropy_src_csr_rw 1.000s 30.527us 1 1 100.00
entropy_src_csr_aliasing 4.000s 203.453us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 167.047us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 2.000s 163.043us 1 1 100.00
entropy_src_tl_intg_err 2.000s 72.286us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
entropy_src_cfg_regwen 1.000s 63.081us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
sec_cm_intersig_mubi 1 2 50.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
entropy_src_fw_ov 158.000s 8806.175us 0 1 0.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 42.852us 1 1 100.00
entropy_src_sec_cm 2.000s 163.043us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 42.852us 1 1 100.00
entropy_src_sec_cm 2.000s 163.043us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 40.000s 11150.786us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 42.852us 1 1 100.00
entropy_src_sec_cm 2.000s 163.043us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 42.852us 1 1 100.00
entropy_src_sec_cm 2.000s 163.043us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 42.852us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 4.000s 181.288us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 2.000s 72.286us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 78.000s 10035.043us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:354) scoreboard [scoreboard] alert recov_alert did not trigger max_delay:*
entropy_src_fw_ov 18100064409245640459531312282585194188548236819073174657344509483773670164529 1282
UVM_INFO @ 8806175140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---