Simulation Results: gpio

 
17/04/2026 01:26:32 DVSim: v1.31.0 sha: ee0af46 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.00 %
  • code
  • 97.16 %
  • assert
  • 96.84 %
  • func
  • 99.99 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 97.69 %
  • toggle
  • 91.41 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.020s 63.788us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.180s 67.709us 1 1 100.00
gpio_smoke_en_cdc_prim 0.950s 251.485us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 0.720s 344.898us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.870s 46.211us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.730s 35.588us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 1.820s 113.866us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.900s 76.382us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.870s 50.466us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.730s 35.588us 1 1 100.00
gpio_csr_aliasing 0.900s 76.382us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.900s 26.677us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.210s 110.230us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.670s 20.765us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 0.800s 21.019us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.270s 62.844us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.140s 555.045us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 9.320s 1531.704us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 1.640s 300.513us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.970s 73.466us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 16.830s 5428.283us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.760s 68.678us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.750s 131.955us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 0.760s 19.033us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 0.760s 19.033us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.730s 35.588us 1 1 100.00
gpio_same_csr_outstanding 0.680s 22.484us 1 1 100.00
gpio_csr_aliasing 0.900s 76.382us 1 1 100.00
gpio_csr_hw_reset 0.870s 46.211us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.730s 35.588us 1 1 100.00
gpio_same_csr_outstanding 0.680s 22.484us 1 1 100.00
gpio_csr_aliasing 0.900s 76.382us 1 1 100.00
gpio_csr_hw_reset 0.870s 46.211us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.170s 1289.101us 1 1 100.00
gpio_sec_cm 0.910s 134.517us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.170s 1289.101us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.760s 14.957us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 1.810s 260.966us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 44189275973143020374891383790111391637821139439213240523416484237385757998485 598
UVM_INFO @ 5428282664 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 83974689662948035793022288866871335081140158348392528111396911997569378118680 81
UVM_INFO @ 260966130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---