Simulation Results: gpio

 
20/04/2026 17:21:27 DVSim: v1.32.0 sha: 8666f0e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.09 %
  • code
  • 97.42 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 98.70 %
  • toggle
  • 91.41 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.100s 259.972us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.450s 222.766us 1 1 100.00
gpio_smoke_en_cdc_prim 1.060s 234.770us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.020s 213.729us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.840s 17.913us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.730s 26.555us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 2.240s 260.749us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.910s 144.515us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 1.410s 32.292us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.730s 26.555us 1 1 100.00
gpio_csr_aliasing 0.910s 144.515us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.830s 38.474us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.050s 238.120us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.750s 72.845us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.250s 94.582us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 0.890s 28.234us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.670s 97.484us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 5.520s 1754.300us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 2.260s 531.944us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.150s 178.293us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 6.460s 3096.827us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.660s 12.927us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.770s 14.833us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 1.700s 278.510us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 1.700s 278.510us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.730s 26.555us 1 1 100.00
gpio_same_csr_outstanding 0.600s 48.184us 1 1 100.00
gpio_csr_aliasing 0.910s 144.515us 1 1 100.00
gpio_csr_hw_reset 0.840s 17.913us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.730s 26.555us 1 1 100.00
gpio_same_csr_outstanding 0.600s 48.184us 1 1 100.00
gpio_csr_aliasing 0.910s 144.515us 1 1 100.00
gpio_csr_hw_reset 0.840s 17.913us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 0.790s 91.058us 1 1 100.00
gpio_sec_cm 1.020s 201.213us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 0.790s 91.058us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.570s 19.723us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 2.630s 1156.829us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*])
gpio_stress_all 12390742109991897497473741550521027270721924464890677749802724994018391505248 165
UVM_INFO @ 3096827024 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done)
gpio_stress_all_with_rand_reset 39435717470169216915088060309416441750089695856987724342634986007941864665011 81
UVM_INFO @ 1156829363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---