Simulation Results: keymgr

 
20/04/2026 17:21:27 DVSim: v1.32.0 sha: 8666f0e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.64 %
  • code
  • 93.71 %
  • assert
  • 97.49 %
  • func
  • 68.71 %
  • line
  • 98.72 %
  • branch
  • 96.07 %
  • cond
  • 90.80 %
  • toggle
  • 96.92 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.850s 36.508us 1 1 100.00
random 1 1 100.00
keymgr_random 4.920s 1266.304us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.940s 27.239us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.070s 27.797us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 17.820s 1758.137us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 6.330s 517.577us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.160s 85.820us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.070s 27.797us 1 1 100.00
keymgr_csr_aliasing 6.330s 517.577us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 4.580s 484.544us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 3.720s 168.809us 1 1 100.00
keymgr_sideload_kmac 1.980s 37.639us 1 1 100.00
keymgr_sideload_aes 5.080s 297.249us 1 1 100.00
keymgr_sideload_otbn 16.640s 4021.570us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 3.430s 250.498us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 3.310s 1135.261us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.540s 108.309us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 5.250s 878.615us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.070s 267.426us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.730s 65.350us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 16.290s 2584.875us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.840s 14.714us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.900s 61.918us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.300s 94.199us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.300s 94.199us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.940s 27.239us 1 1 100.00
keymgr_csr_rw 1.070s 27.797us 1 1 100.00
keymgr_csr_aliasing 6.330s 517.577us 1 1 100.00
keymgr_same_csr_outstanding 1.180s 49.917us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.940s 27.239us 1 1 100.00
keymgr_csr_rw 1.070s 27.797us 1 1 100.00
keymgr_csr_aliasing 6.330s 517.577us 1 1 100.00
keymgr_same_csr_outstanding 1.180s 49.917us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
keymgr_tl_intg_err 2.130s 227.721us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 3.650s 511.215us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 3.650s 511.215us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 3.650s 511.215us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 3.650s 511.215us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 4.900s 337.974us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 2.130s 227.721us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 3.650s 511.215us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 4.580s 484.544us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 4.920s 1266.304us 1 1 100.00
keymgr_csr_rw 1.070s 27.797us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 4.920s 1266.304us 1 1 100.00
keymgr_csr_rw 1.070s 27.797us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 4.920s 1266.304us 1 1 100.00
keymgr_csr_rw 1.070s 27.797us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 3.310s 1135.261us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.070s 267.426us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.070s 267.426us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 4.920s 1266.304us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 3.510s 631.971us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.800s 392.837us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 3.310s 1135.261us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.800s 392.837us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.800s 392.837us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.800s 392.837us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.020s 994.002us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.800s 392.837us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 10.300s 1835.307us 1 1 100.00