Simulation Results: sysrst_ctrl

 
20/04/2026 17:21:27 DVSim: v1.32.0 sha: 8666f0e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 82.30 %
  • code
  • 90.59 %
  • assert
  • 89.37 %
  • func
  • 66.94 %
  • line
  • 95.72 %
  • branch
  • 96.40 %
  • cond
  • 93.54 %
  • toggle
  • 100.00 %
  • FSM
  • 67.31 %
Validation stages
V1
100.00%
V2
94.44%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
sysrst_ctrl_smoke 4.640s 2112.143us 1 1 100.00
input_output_inverted 1 1 100.00
sysrst_ctrl_in_out_inverted 3.450s 2459.044us 1 1 100.00
combo_detect_ec_rst 1 1 100.00
sysrst_ctrl_combo_detect_ec_rst 1.150s 2200.245us 1 1 100.00
combo_detect_ec_rst_with_pre_cond 1 1 100.00
sysrst_ctrl_combo_detect_ec_rst_with_pre_cond 4.850s 2259.297us 1 1 100.00
csr_hw_reset 1 1 100.00
sysrst_ctrl_csr_hw_reset 2.680s 4039.407us 1 1 100.00
csr_rw 1 1 100.00
sysrst_ctrl_csr_rw 2.150s 2055.581us 1 1 100.00
csr_bit_bash 1 1 100.00
sysrst_ctrl_csr_bit_bash 30.970s 22398.572us 1 1 100.00
csr_aliasing 1 1 100.00
sysrst_ctrl_csr_aliasing 4.770s 3197.853us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
sysrst_ctrl_csr_mem_rw_with_rand_reset 2.030s 2117.405us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
sysrst_ctrl_csr_rw 2.150s 2055.581us 1 1 100.00
sysrst_ctrl_csr_aliasing 4.770s 3197.853us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
combo_detect 1 1 100.00
sysrst_ctrl_combo_detect 73.560s 80851.629us 1 1 100.00
combo_detect_with_pre_cond 1 1 100.00
sysrst_ctrl_combo_detect_with_pre_cond 151.080s 135918.914us 1 1 100.00
auto_block_key_outputs 1 1 100.00
sysrst_ctrl_auto_blk_key_output 1.920s 3642.723us 1 1 100.00
keyboard_input_triggered_interrupt 1 1 100.00
sysrst_ctrl_edge_detect 1.150s 5221.759us 1 1 100.00
pin_output_keyboard_inversion_control 1 1 100.00
sysrst_ctrl_pin_override_test 3.240s 2517.770us 1 1 100.00
pin_input_value_accessibility 1 1 100.00
sysrst_ctrl_pin_access_test 4.820s 2227.307us 1 1 100.00
ec_power_on_reset 1 1 100.00
sysrst_ctrl_ec_pwr_on_rst 2.410s 4059.498us 1 1 100.00
flash_write_protect_output 1 1 100.00
sysrst_ctrl_flash_wr_prot_out 5.600s 2611.268us 1 1 100.00
ultra_low_power_test 0 1 0.00
sysrst_ctrl_ultra_low_pwr 5.460s 6844.211us 0 1 0.00
sysrst_ctrl_feature_disable 1 1 100.00
sysrst_ctrl_feature_disable 17.060s 30796.139us 1 1 100.00
stress_all 1 1 100.00
sysrst_ctrl_stress_all 15.160s 8402.872us 1 1 100.00
alert_test 1 1 100.00
sysrst_ctrl_alert_test 4.760s 2009.354us 1 1 100.00
intr_test 1 1 100.00
sysrst_ctrl_intr_test 1.550s 2030.228us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
sysrst_ctrl_tl_errors 3.030s 2134.909us 1 1 100.00
tl_d_illegal_access 1 1 100.00
sysrst_ctrl_tl_errors 3.030s 2134.909us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
sysrst_ctrl_csr_hw_reset 2.680s 4039.407us 1 1 100.00
sysrst_ctrl_csr_rw 2.150s 2055.581us 1 1 100.00
sysrst_ctrl_csr_aliasing 4.770s 3197.853us 1 1 100.00
sysrst_ctrl_same_csr_outstanding 4.550s 5350.390us 1 1 100.00
tl_d_partial_access 4 4 100.00
sysrst_ctrl_csr_hw_reset 2.680s 4039.407us 1 1 100.00
sysrst_ctrl_csr_rw 2.150s 2055.581us 1 1 100.00
sysrst_ctrl_csr_aliasing 4.770s 3197.853us 1 1 100.00
sysrst_ctrl_same_csr_outstanding 4.550s 5350.390us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
sysrst_ctrl_sec_cm 19.160s 42148.926us 1 1 100.00
sysrst_ctrl_tl_intg_err 8.680s 22340.433us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
sysrst_ctrl_tl_intg_err 8.680s 22340.433us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
sysrst_ctrl_stress_all_with_rand_reset 3.960s 7112.173us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:255) scoreboard [scoreboard] alert fatal_fault has unexpected timeout error
sysrst_ctrl_ultra_low_pwr 53017037919685368410034118295950830173784951509451455371562395067686640365207 659
UVM_ERROR @ 6844210866 ps: (cip_base_scoreboard.sv:267) [uvm_test_top.env.scoreboard] Check failed expected_alert[alert_name].expected == 1 (0 [0x0] vs 1 [0x1]) alert fatal_fault triggered unexpectedly
UVM_INFO @ 6844210866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---