Simulation Results: entropy_src/rng_4bits

 
21/04/2026 00:01:59 DVSim: v1.32.0 sha: 089baca json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 74.47 %
  • code
  • 87.11 %
  • assert
  • 83.58 %
  • func
  • 52.72 %
  • block
  • 94.46 %
  • line
  • 97.19 %
  • branch
  • 86.35 %
  • toggle
  • 76.38 %
  • FSM
  • 88.54 %
Validation stages
V1
83.33%
V2
93.75%
V2S
85.71%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
entropy_src_smoke 1.000s 86.663us 1 1 100.00
csr_hw_reset 1 1 100.00
entropy_src_csr_hw_reset 1.000s 30.798us 1 1 100.00
csr_rw 1 1 100.00
entropy_src_csr_rw 2.000s 18.279us 1 1 100.00
csr_bit_bash 1 1 100.00
entropy_src_csr_bit_bash 5.000s 623.928us 1 1 100.00
csr_aliasing 1 1 100.00
entropy_src_csr_aliasing 3.000s 122.898us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
entropy_src_csr_mem_rw_with_rand_reset 1.000s 35.193us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
entropy_src_csr_rw 2.000s 18.279us 1 1 100.00
entropy_src_csr_aliasing 3.000s 122.898us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
firmware 2 3 66.67
entropy_src_smoke 1.000s 86.663us 1 1 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
entropy_src_fw_ov 52.000s 6324.849us 0 1 0.00
firmware_mode 0 1 0.00
entropy_src_fw_ov 52.000s 6324.849us 0 1 0.00
rng_mode 1 1 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
rng_max_rate 1 1 100.00
entropy_src_rng_max_rate 364.000s 14048.655us 1 1 100.00
health_checks 1 1 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
conditioning 1 1 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
interrupts 2 2 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
entropy_src_intr 9.000s 1778.187us 1 1 100.00
alerts 2 2 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
entropy_src_functional_alerts 4.000s 173.725us 1 1 100.00
stress_all 1 1 100.00
entropy_src_stress_all 185.000s 13179.293us 1 1 100.00
functional_errors 1 1 100.00
entropy_src_functional_errors 2.000s 76.150us 1 1 100.00
firmware_ov_read_contiguous_data 1 1 100.00
entropy_src_fw_ov_contiguous 4.000s 183.026us 1 1 100.00
intr_test 1 1 100.00
entropy_src_intr_test 1.000s 22.049us 1 1 100.00
alert_test 1 1 100.00
entropy_src_alert_test 2.000s 17.100us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
entropy_src_tl_errors 2.000s 72.187us 1 1 100.00
tl_d_illegal_access 1 1 100.00
entropy_src_tl_errors 2.000s 72.187us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
entropy_src_csr_hw_reset 1.000s 30.798us 1 1 100.00
entropy_src_csr_rw 2.000s 18.279us 1 1 100.00
entropy_src_csr_aliasing 3.000s 122.898us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 56.892us 1 1 100.00
tl_d_partial_access 4 4 100.00
entropy_src_csr_hw_reset 1.000s 30.798us 1 1 100.00
entropy_src_csr_rw 2.000s 18.279us 1 1 100.00
entropy_src_csr_aliasing 3.000s 122.898us 1 1 100.00
entropy_src_same_csr_outstanding 2.000s 56.892us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
entropy_src_sec_cm 3.000s 117.872us 1 1 100.00
entropy_src_tl_intg_err 3.000s 740.325us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
entropy_src_cfg_regwen 1.000s 16.347us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
sec_cm_config_redun 1 1 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
sec_cm_intersig_mubi 1 2 50.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
entropy_src_fw_ov 52.000s 6324.849us 0 1 0.00
sec_cm_main_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 76.150us 1 1 100.00
entropy_src_sec_cm 3.000s 117.872us 1 1 100.00
sec_cm_ack_sm_fsm_sparse 2 2 100.00
entropy_src_functional_errors 2.000s 76.150us 1 1 100.00
entropy_src_sec_cm 3.000s 117.872us 1 1 100.00
sec_cm_rng_bkgn_chk 1 1 100.00
entropy_src_rng 51.000s 13122.508us 1 1 100.00
sec_cm_fifo_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 76.150us 1 1 100.00
entropy_src_sec_cm 3.000s 117.872us 1 1 100.00
sec_cm_ctr_redun 2 2 100.00
entropy_src_functional_errors 2.000s 76.150us 1 1 100.00
entropy_src_sec_cm 3.000s 117.872us 1 1 100.00
sec_cm_ctr_local_esc 1 1 100.00
entropy_src_functional_errors 2.000s 76.150us 1 1 100.00
sec_cm_esfinal_rdata_bus_consistency 1 1 100.00
entropy_src_functional_alerts 4.000s 173.725us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
entropy_src_tl_intg_err 3.000s 740.325us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
external_health_tests 1 1 100.00
entropy_src_rng_with_xht_rsps 227.000s 13061.037us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_scoreboard.sv:354) scoreboard [scoreboard] alert recov_alert did not trigger max_delay:*
entropy_src_fw_ov 80709786248068790408997499238123556044328345724070789489752964968807317532857 1332
UVM_INFO @ 6324848646 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (entropy_src_base_vseq.sv:83) virtual_sequencer [mirror] Failed to mirror extht_lo_total_fails
entropy_src_csr_mem_rw_with_rand_reset 74119459106053379970035295417791769598308789298352946996816933565308104908334 113
UVM_INFO @ 35193029 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---