Simulation Results: otbn

 
29/04/2026 15:30:23 DVSim: v1.33.0 sha: a64a82b json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 94.09 %
  • code
  • 95.25 %
  • assert
  • 89.57 %
  • func
  • 97.46 %
  • block
  • 99.38 %
  • line
  • 99.57 %
  • branch
  • 92.21 %
  • toggle
  • 91.79 %
  • FSM
  • 97.44 %
Validation stages
V1
100.00%
V2
92.86%
V2S
88.00%
V3
0.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
otbn_smoke 13.000s 110.526us 1 1 100.00
single_binary 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
csr_hw_reset 1 1 100.00
otbn_csr_hw_reset 4.000s 42.227us 1 1 100.00
csr_rw 1 1 100.00
otbn_csr_rw 3.000s 39.086us 1 1 100.00
csr_bit_bash 1 1 100.00
otbn_csr_bit_bash 6.000s 65.294us 1 1 100.00
csr_aliasing 1 1 100.00
otbn_csr_aliasing 5.000s 80.537us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
otbn_csr_mem_rw_with_rand_reset 8.000s 65.480us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otbn_csr_rw 3.000s 39.086us 1 1 100.00
otbn_csr_aliasing 5.000s 80.537us 1 1 100.00
mem_walk 1 1 100.00
otbn_mem_walk 82.000s 19418.090us 1 1 100.00
mem_partial_access 1 1 100.00
otbn_mem_partial_access 23.000s 650.246us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_recovery 1 1 100.00
otbn_reset 22.000s 100.778us 1 1 100.00
multi_error 1 1 100.00
otbn_multi_err 43.000s 2732.930us 1 1 100.00
back_to_back 1 1 100.00
otbn_multi 37.000s 96.309us 1 1 100.00
stress_all 1 1 100.00
otbn_stress_all 53.000s 224.767us 1 1 100.00
lc_escalation 1 1 100.00
otbn_escalate 6.000s 18.108us 1 1 100.00
zero_state_err_urnd 0 1 0.00
otbn_zero_state_err_urnd 5.000s 116.102us 0 1 0.00
sw_errs_fatal_chk 1 1 100.00
otbn_sw_errs_fatal_chk 18.000s 107.182us 1 1 100.00
alert_test 1 1 100.00
otbn_alert_test 8.000s 25.253us 1 1 100.00
intr_test 1 1 100.00
otbn_intr_test 3.000s 39.601us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otbn_tl_errors 6.000s 41.490us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otbn_tl_errors 6.000s 41.490us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otbn_csr_hw_reset 4.000s 42.227us 1 1 100.00
otbn_csr_rw 3.000s 39.086us 1 1 100.00
otbn_csr_aliasing 5.000s 80.537us 1 1 100.00
otbn_same_csr_outstanding 4.000s 24.457us 1 1 100.00
tl_d_partial_access 4 4 100.00
otbn_csr_hw_reset 4.000s 42.227us 1 1 100.00
otbn_csr_rw 3.000s 39.086us 1 1 100.00
otbn_csr_aliasing 5.000s 80.537us 1 1 100.00
otbn_same_csr_outstanding 4.000s 24.457us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mem_integrity 2 2 100.00
otbn_imem_err 7.000s 53.854us 1 1 100.00
otbn_dmem_err 7.000s 175.858us 1 1 100.00
internal_integrity 3 4 75.00
otbn_alu_bignum_mod_err 7.000s 197.466us 1 1 100.00
otbn_controller_ispr_rdata_err 9.000s 206.242us 1 1 100.00
otbn_mac_bignum_acc_err 7.000s 198.352us 1 1 100.00
otbn_urnd_err 5.000s 9.614us 0 1 0.00
illegal_bus_access 1 1 100.00
otbn_illegal_mem_acc 6.000s 76.954us 1 1 100.00
otbn_mem_gnt_acc_err 1 1 100.00
otbn_mem_gnt_acc_err 6.000s 16.852us 1 1 100.00
otbn_non_sec_partial_wipe 0 1 0.00
otbn_partial_wipe 5.000s 8.713us 0 1 0.00
tl_intg_err 2 2 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
otbn_tl_intg_err 13.000s 251.467us 1 1 100.00
passthru_mem_tl_intg_err 1 1 100.00
otbn_passthru_mem_tl_intg_err 37.000s 686.582us 1 1 100.00
prim_fsm_check 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
prim_count_check 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
otbn_smoke 13.000s 110.526us 1 1 100.00
sec_cm_data_mem_integrity 1 1 100.00
otbn_dmem_err 7.000s 175.858us 1 1 100.00
sec_cm_instruction_mem_integrity 1 1 100.00
otbn_imem_err 7.000s 53.854us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otbn_tl_intg_err 13.000s 251.467us 1 1 100.00
sec_cm_controller_fsm_global_esc 1 1 100.00
otbn_escalate 6.000s 18.108us 1 1 100.00
sec_cm_controller_fsm_local_esc 4 5 80.00
otbn_imem_err 7.000s 53.854us 1 1 100.00
otbn_dmem_err 7.000s 175.858us 1 1 100.00
otbn_zero_state_err_urnd 5.000s 116.102us 0 1 0.00
otbn_illegal_mem_acc 6.000s 76.954us 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_controller_fsm_sparse 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
sec_cm_scramble_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 7.000s 53.854us 1 1 100.00
otbn_dmem_err 7.000s 175.858us 1 1 100.00
otbn_zero_state_err_urnd 5.000s 116.102us 0 1 0.00
otbn_illegal_mem_acc 6.000s 76.954us 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_scramble_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_global_esc 1 1 100.00
otbn_escalate 6.000s 18.108us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_local_esc 4 5 80.00
otbn_imem_err 7.000s 53.854us 1 1 100.00
otbn_dmem_err 7.000s 175.858us 1 1 100.00
otbn_zero_state_err_urnd 5.000s 116.102us 0 1 0.00
otbn_illegal_mem_acc 6.000s 76.954us 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_start_stop_ctrl_fsm_sparse 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_data_reg_sw_sca 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
sec_cm_ctrl_redun 1 1 100.00
otbn_ctrl_redun 5.000s 35.192us 1 1 100.00
sec_cm_pc_ctrl_flow_redun 1 1 100.00
otbn_pc_ctrl_flow_redun 7.000s 20.754us 1 1 100.00
sec_cm_rnd_bus_consistency 1 1 100.00
otbn_rnd_sec_cm 40.000s 977.710us 1 1 100.00
sec_cm_rnd_rng_digest 1 1 100.00
otbn_rnd_sec_cm 40.000s 977.710us 1 1 100.00
sec_cm_rf_base_data_reg_sw_integrity 1 1 100.00
otbn_rf_base_intg_err 5.000s 15.446us 1 1 100.00
sec_cm_rf_base_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_stack_wr_ptr_ctr_redun 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_integrity 1 1 100.00
otbn_rf_bignum_intg_err 8.000s 52.520us 1 1 100.00
sec_cm_rf_bignum_data_reg_sw_glitch_detect 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_loop_stack_ctr_redun 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
sec_cm_loop_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 6.000s 14.873us 1 1 100.00
sec_cm_call_stack_addr_integrity 1 1 100.00
otbn_stack_addr_integ_chk 6.000s 14.873us 1 1 100.00
sec_cm_start_stop_ctrl_state_consistency 1 1 100.00
otbn_sec_wipe_err 4.000s 10.372us 1 1 100.00
sec_cm_data_mem_sec_wipe 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
sec_cm_instruction_mem_sec_wipe 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
sec_cm_data_reg_sw_sec_wipe 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
sec_cm_write_mem_integrity 1 1 100.00
otbn_multi 37.000s 96.309us 1 1 100.00
sec_cm_ctrl_flow_count 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
sec_cm_ctrl_flow_sca 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
sec_cm_data_mem_sw_noaccess 1 1 100.00
otbn_sw_no_acc 11.000s 153.299us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
otbn_single 61.000s 527.120us 1 1 100.00
sec_cm_tlul_fifo_ctr_redun 1 1 100.00
otbn_sec_cm 117.000s 717.235us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
otbn_stress_all_with_rand_reset 40.000s 807.449us 0 1 0.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
otbn_smoke_vectorized 7.000s 42.830us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (cip_base_vseq.sv:1237) [otbn_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.
otbn_stress_all_with_rand_reset 46933859625248079406124857626961312783182600291887097851187401567122203459055 181
UVM_INFO @ 807449050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.u_otbn_core.u_otbn_rnd.u_xoshiro256pp.xoshiro_q cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)
otbn_zero_state_err_urnd 34746404313541094064220191837941019239344263193484093976158185561349674083255 105
UVM_INFO @ 116101979 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (uvm_hdl_inca.c:743) [UVM/DPI/NOBJ3] name tb.dut.edn_urnd_ack cannot be resolved to a hdl object (vlog,vhdl,vlog-slice)
otbn_urnd_err 59703953378993573001635671533392271483401031325031212077961300833745526594359 110
UVM_INFO @ 9613632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_sva_*/otbn_idle_checker.sv,171): Assertion NotRunningWhenLocked_A has failed
otbn_partial_wipe 29000578955217613343413989268020654474906349593994009549740877859579304281016 104
UVM_ERROR @ 8713049 ps: (otbn_idle_checker.sv:171) [ASSERT FAILED] NotRunningWhenLocked_A
UVM_INFO @ 8713049 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---