Simulation Results: pwrmgr

 
29/04/2026 15:30:23 DVSim: v1.33.0 sha: a64a82b json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.72 %
  • code
  • 94.37 %
  • assert
  • 96.08 %
  • func
  • 96.71 %
  • line
  • 98.92 %
  • branch
  • 95.42 %
  • cond
  • 93.49 %
  • toggle
  • 90.02 %
  • FSM
  • 94.00 %
Validation stages
V1
100.00%
V2
100.00%
V2S
80.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
pwrmgr_smoke 0.650s 42.709us 1 1 100.00
csr_hw_reset 1 1 100.00
pwrmgr_csr_hw_reset 0.840s 24.122us 1 1 100.00
csr_rw 1 1 100.00
pwrmgr_csr_rw 0.770s 85.172us 1 1 100.00
csr_bit_bash 1 1 100.00
pwrmgr_csr_bit_bash 2.740s 311.283us 1 1 100.00
csr_aliasing 1 1 100.00
pwrmgr_csr_aliasing 0.970s 22.169us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
pwrmgr_csr_mem_rw_with_rand_reset 1.190s 81.374us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
pwrmgr_csr_rw 0.770s 85.172us 1 1 100.00
pwrmgr_csr_aliasing 0.970s 22.169us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
wakeup 1 1 100.00
pwrmgr_wakeup 0.990s 415.804us 1 1 100.00
control_clks 1 1 100.00
pwrmgr_wakeup 0.990s 415.804us 1 1 100.00
aborted_low_power 2 2 100.00
pwrmgr_aborted_low_power 1.060s 54.693us 1 1 100.00
pwrmgr_lowpower_invalid 0.820s 75.743us 1 1 100.00
reset 2 2 100.00
pwrmgr_reset 0.710s 45.046us 1 1 100.00
pwrmgr_reset_invalid 0.980s 255.959us 1 1 100.00
main_power_glitch_reset 1 1 100.00
pwrmgr_reset 0.710s 45.046us 1 1 100.00
reset_wakeup_race 1 1 100.00
pwrmgr_wakeup_reset 1.220s 415.295us 1 1 100.00
lowpower_wakeup_race 1 1 100.00
pwrmgr_lowpower_wakeup_race 0.840s 121.164us 1 1 100.00
disable_rom_integrity_check 1 1 100.00
pwrmgr_disable_rom_integrity_check 0.720s 89.273us 1 1 100.00
stress_all 1 1 100.00
pwrmgr_stress_all 1.110s 687.212us 1 1 100.00
intr_test 1 1 100.00
pwrmgr_intr_test 0.880s 52.352us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
pwrmgr_tl_errors 1.470s 421.237us 1 1 100.00
tl_d_illegal_access 1 1 100.00
pwrmgr_tl_errors 1.470s 421.237us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
pwrmgr_csr_hw_reset 0.840s 24.122us 1 1 100.00
pwrmgr_csr_rw 0.770s 85.172us 1 1 100.00
pwrmgr_csr_aliasing 0.970s 22.169us 1 1 100.00
pwrmgr_same_csr_outstanding 0.830s 27.562us 1 1 100.00
tl_d_partial_access 4 4 100.00
pwrmgr_csr_hw_reset 0.840s 24.122us 1 1 100.00
pwrmgr_csr_rw 0.770s 85.172us 1 1 100.00
pwrmgr_csr_aliasing 0.970s 22.169us 1 1 100.00
pwrmgr_same_csr_outstanding 0.830s 27.562us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 0 2 0.00
pwrmgr_tl_intg_err 0.740s 6.484us 0 1 0.00
pwrmgr_sec_cm 0.750s 75.362us 0 1 0.00
prim_count_check 0 1 0.00
pwrmgr_sec_cm 0.750s 75.362us 0 1 0.00
prim_fsm_check 0 1 0.00
pwrmgr_sec_cm 0.750s 75.362us 0 1 0.00
sec_cm_bus_integrity 0 1 0.00
pwrmgr_tl_intg_err 0.740s 6.484us 0 1 0.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
pwrmgr_sec_cm_lc_ctrl_intersig_mubi 1.680s 828.580us 1 1 100.00
sec_cm_rom_ctrl_intersig_mubi 1 1 100.00
pwrmgr_wakeup_reset 1.220s 415.295us 1 1 100.00
sec_cm_rstmgr_intersig_mubi 1 1 100.00
pwrmgr_sec_cm_rstmgr_intersig_mubi 0.960s 157.762us 1 1 100.00
sec_cm_esc_rx_clk_bkgn_chk 1 1 100.00
pwrmgr_esc_clk_rst_malfunc 0.720s 39.753us 1 1 100.00
sec_cm_esc_rx_clk_local_esc 0 1 0.00
pwrmgr_sec_cm 0.750s 75.362us 0 1 0.00
sec_cm_fsm_sparse 0 1 0.00
pwrmgr_sec_cm 0.750s 75.362us 0 1 0.00
sec_cm_fsm_terminal 0 1 0.00
pwrmgr_sec_cm 0.750s 75.362us 0 1 0.00
sec_cm_ctrl_flow_global_esc 1 1 100.00
pwrmgr_global_esc 0.700s 51.426us 1 1 100.00
sec_cm_main_pd_rst_local_esc 1 1 100.00
pwrmgr_glitch 0.620s 53.298us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
pwrmgr_sec_cm_ctrl_config_regwen 0.790s 53.364us 1 1 100.00
sec_cm_wakeup_config_regwen 1 1 100.00
pwrmgr_csr_rw 0.770s 85.172us 1 1 100.00
sec_cm_reset_config_regwen 1 1 100.00
pwrmgr_csr_rw 0.770s 85.172us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
escalation_timeout 0 1 0.00
pwrmgr_escalation_timeout 1.090s 403.117us 0 1 0.00
stress_all_with_rand_reset 1 1 100.00
pwrmgr_stress_all_with_rand_reset 2.450s 919.624us 1 1 100.00

Error Messages

   Test seed line log context
Offending '((!clk_en) || status)'
pwrmgr_escalation_timeout 35086593004183515545984797053318261355202341971683090375906976116798639199799 79
UVM_ERROR @ 403116542 ps: (clkmgr_pwrmgr_sva_if.sv:37) [ASSERT FAILED] StatusRise_A
UVM_INFO @ 403116542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1022) virtual_sequencer [pwrmgr_common_vseq] expect alert:fatal_fault to fire
pwrmgr_tl_intg_err 113946310802234347606772579008116477405161381803661130694754732663967399425798 78
UVM_INFO @ 6484160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
pwrmgr_sec_cm 98952154593683814935048002682649560206981347946524064296444971377077900319939 83
UVM_INFO @ 75361690 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---