Simulation Results: flash_ctrl

 
30/04/2026 15:30:31 DVSim: v1.33.0 sha: c776b8b json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 95.63 %
  • code
  • 94.19 %
  • assert
  • 96.76 %
  • func
  • 95.94 %
  • line
  • 95.95 %
  • branch
  • 97.10 %
  • cond
  • 93.63 %
  • toggle
  • 97.88 %
  • FSM
  • 86.39 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
flash_ctrl_smoke 39.590s 84.888us 1 1 100.00
smoke_hw 1 1 100.00
flash_ctrl_smoke_hw 11.420s 18.631us 1 1 100.00
csr_hw_reset 1 1 100.00
flash_ctrl_csr_hw_reset 19.470s 357.886us 1 1 100.00
csr_rw 1 1 100.00
flash_ctrl_csr_rw 8.350s 55.951us 1 1 100.00
csr_bit_bash 1 1 100.00
flash_ctrl_csr_bit_bash 31.610s 6234.712us 1 1 100.00
csr_aliasing 1 1 100.00
flash_ctrl_csr_aliasing 25.720s 3470.705us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
flash_ctrl_csr_mem_rw_with_rand_reset 7.970s 50.800us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
flash_ctrl_csr_rw 8.350s 55.951us 1 1 100.00
flash_ctrl_csr_aliasing 25.720s 3470.705us 1 1 100.00
mem_walk 1 1 100.00
flash_ctrl_mem_walk 8.730s 53.293us 1 1 100.00
mem_partial_access 1 1 100.00
flash_ctrl_mem_partial_access 6.060s 58.072us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sw_op 1 1 100.00
flash_ctrl_sw_op 12.340s 78.196us 1 1 100.00
host_read_direct 1 1 100.00
flash_ctrl_host_dir_rd 25.040s 45.725us 1 1 100.00
rma_hw_if 3 3 100.00
flash_ctrl_hw_rma 1110.270s 212452.674us 1 1 100.00
flash_ctrl_hw_rma_reset 519.860s 50129.085us 1 1 100.00
flash_ctrl_lcmgr_intg 8.940s 75.930us 1 1 100.00
host_controller_arb 1 1 100.00
flash_ctrl_host_ctrl_arb 1375.880s 559335.414us 1 1 100.00
erase_suspend 1 1 100.00
flash_ctrl_erase_suspend 234.100s 6427.994us 1 1 100.00
program_reset 1 1 100.00
flash_ctrl_prog_reset 7.260s 21.279us 1 1 100.00
full_memory_access 1 1 100.00
flash_ctrl_full_mem_access 1837.570s 79821.591us 1 1 100.00
rd_buff_eviction 1 1 100.00
flash_ctrl_rd_buff_evict 61.540s 4136.977us 1 1 100.00
rd_buff_eviction_w_ecc 3 3 100.00
flash_ctrl_rw_evict 12.070s 47.132us 1 1 100.00
flash_ctrl_rw_evict_all_en 11.610s 28.806us 1 1 100.00
flash_ctrl_re_evict 15.670s 78.201us 1 1 100.00
host_arb 1 1 100.00
flash_ctrl_phy_arb 22.620s 85.279us 1 1 100.00
host_interleave 1 1 100.00
flash_ctrl_phy_arb 22.620s 85.279us 1 1 100.00
memory_protection 1 1 100.00
flash_ctrl_mp_regions 395.690s 8057.448us 1 1 100.00
fetch_code 1 1 100.00
flash_ctrl_fetch_code 19.940s 3588.748us 1 1 100.00
all_partitions 1 1 100.00
flash_ctrl_rand_ops 515.600s 284.852us 1 1 100.00
error_mp 1 1 100.00
flash_ctrl_error_mp 285.940s 7865.862us 1 1 100.00
error_prog_win 1 1 100.00
flash_ctrl_error_prog_win 258.590s 1850.118us 1 1 100.00
error_prog_type 1 1 100.00
flash_ctrl_error_prog_type 945.320s 2321.845us 1 1 100.00
error_read_seed 1 1 100.00
flash_ctrl_hw_read_seed_err 5.590s 112.049us 1 1 100.00
read_write_overflow 1 1 100.00
flash_ctrl_oversize_error 124.140s 2458.269us 1 1 100.00
flash_ctrl_disable 1 1 100.00
flash_ctrl_disable 11.150s 20.530us 1 1 100.00
flash_ctrl_connect 1 1 100.00
flash_ctrl_connect 5.190s 16.762us 1 1 100.00
stress_all 1 1 100.00
flash_ctrl_stress_all 69.420s 284.430us 1 1 100.00
secret_partition 2 2 100.00
flash_ctrl_hw_sec_otp 91.530s 3187.248us 1 1 100.00
flash_ctrl_otp_reset 41.440s 170.927us 1 1 100.00
isolation_partition 1 1 100.00
flash_ctrl_hw_rma 1110.270s 212452.674us 1 1 100.00
interrupts 4 4 100.00
flash_ctrl_intr_rd 128.700s 1673.986us 1 1 100.00
flash_ctrl_intr_wr 53.910s 3034.818us 1 1 100.00
flash_ctrl_intr_rd_slow_flash 93.310s 5942.749us 1 1 100.00
flash_ctrl_intr_wr_slow_flash 121.650s 41932.854us 1 1 100.00
invalid_op 1 1 100.00
flash_ctrl_invalid_op 60.050s 874.059us 1 1 100.00
mid_op_rst 1 1 100.00
flash_ctrl_mid_op_rst 41.340s 1332.035us 1 1 100.00
double_bit_err 5 5 100.00
flash_ctrl_read_word_sweep_derr 9.250s 86.253us 1 1 100.00
flash_ctrl_ro_derr 101.940s 768.658us 1 1 100.00
flash_ctrl_rw_derr 140.540s 2622.938us 1 1 100.00
flash_ctrl_derr_detect 109.020s 6114.749us 1 1 100.00
flash_ctrl_integrity 449.150s 5529.787us 1 1 100.00
single_bit_err 3 3 100.00
flash_ctrl_read_word_sweep_serr 10.230s 48.418us 1 1 100.00
flash_ctrl_ro_serr 91.170s 10761.828us 1 1 100.00
flash_ctrl_rw_serr 123.960s 1634.253us 1 1 100.00
singlebit_err_counter 1 1 100.00
flash_ctrl_serr_counter 39.270s 578.193us 1 1 100.00
singlebit_err_address 1 1 100.00
flash_ctrl_serr_address 85.320s 1172.354us 1 1 100.00
scramble 5 5 100.00
flash_ctrl_wo 144.480s 12394.082us 1 1 100.00
flash_ctrl_write_word_sweep 7.450s 143.761us 1 1 100.00
flash_ctrl_read_word_sweep 6.460s 25.793us 1 1 100.00
flash_ctrl_ro 76.420s 1360.161us 1 1 100.00
flash_ctrl_rw 441.640s 30828.601us 1 1 100.00
filesystem_support 1 1 100.00
flash_ctrl_fs_sup 26.750s 1264.083us 1 1 100.00
rma_write_process_error 2 2 100.00
flash_ctrl_rma_err 606.120s 159361.204us 1 1 100.00
flash_ctrl_hw_prog_rma_wipe_err 40.240s 10063.938us 1 1 100.00
alert_test 1 1 100.00
flash_ctrl_alert_test 5.580s 30.925us 1 1 100.00
intr_test 1 1 100.00
flash_ctrl_intr_test 8.290s 161.655us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
flash_ctrl_tl_errors 11.110s 39.485us 1 1 100.00
tl_d_illegal_access 1 1 100.00
flash_ctrl_tl_errors 11.110s 39.485us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
flash_ctrl_csr_hw_reset 19.470s 357.886us 1 1 100.00
flash_ctrl_csr_rw 8.350s 55.951us 1 1 100.00
flash_ctrl_csr_aliasing 25.720s 3470.705us 1 1 100.00
flash_ctrl_same_csr_outstanding 14.550s 640.307us 1 1 100.00
tl_d_partial_access 4 4 100.00
flash_ctrl_csr_hw_reset 19.470s 357.886us 1 1 100.00
flash_ctrl_csr_rw 8.350s 55.951us 1 1 100.00
flash_ctrl_csr_aliasing 25.720s 3470.705us 1 1 100.00
flash_ctrl_same_csr_outstanding 14.550s 640.307us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
flash_ctrl_shadow_reg_errors 48.370s 301.246us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
flash_ctrl_shadow_reg_errors 48.370s 301.246us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
flash_ctrl_shadow_reg_errors 48.370s 301.246us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
flash_ctrl_shadow_reg_errors 48.370s 301.246us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
flash_ctrl_shadow_reg_errors_with_csr_rw 50.230s 131.184us 1 1 100.00
tl_intg_err 2 2 100.00
flash_ctrl_sec_cm 1490.730s 5527.695us 1 1 100.00
flash_ctrl_tl_intg_err 270.550s 4628.511us 1 1 100.00
sec_cm_reg_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 270.550s 4628.511us 1 1 100.00
sec_cm_host_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 270.550s 4628.511us 1 1 100.00
sec_cm_mem_bus_integrity 2 2 100.00
flash_ctrl_rd_intg 13.640s 71.789us 1 1 100.00
flash_ctrl_wr_intg 8.750s 47.845us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
flash_ctrl_smoke 39.590s 84.888us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 4 4 100.00
flash_ctrl_otp_reset 41.440s 170.927us 1 1 100.00
flash_ctrl_disable 11.150s 20.530us 1 1 100.00
flash_ctrl_sec_info_access 35.860s 1695.274us 1 1 100.00
flash_ctrl_connect 5.190s 16.762us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
flash_ctrl_config_regwen 8.010s 21.281us 1 1 100.00
sec_cm_data_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.350s 55.951us 1 1 100.00
sec_cm_data_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 48.370s 301.246us 1 1 100.00
sec_cm_info_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.350s 55.951us 1 1 100.00
sec_cm_info_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 48.370s 301.246us 1 1 100.00
sec_cm_bank_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.350s 55.951us 1 1 100.00
sec_cm_bank_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 48.370s 301.246us 1 1 100.00
sec_cm_mem_ctrl_global_esc 1 1 100.00
flash_ctrl_disable 11.150s 20.530us 1 1 100.00
sec_cm_mem_ctrl_local_esc 2 2 100.00
flash_ctrl_rd_intg 13.640s 71.789us 1 1 100.00
flash_ctrl_access_after_disable 5.760s 52.836us 1 1 100.00
sec_cm_mem_addr_infection 1 1 100.00
flash_ctrl_host_addr_infection 12.490s 39.096us 1 1 100.00
sec_cm_mem_disable_config_mubi 1 1 100.00
flash_ctrl_disable 11.150s 20.530us 1 1 100.00
sec_cm_exec_config_redun 1 1 100.00
flash_ctrl_fetch_code 19.940s 3588.748us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
flash_ctrl_rw 441.640s 30828.601us 1 1 100.00
sec_cm_mem_integrity 3 3 100.00
flash_ctrl_rw_serr 123.960s 1634.253us 1 1 100.00
flash_ctrl_rw_derr 140.540s 2622.938us 1 1 100.00
flash_ctrl_integrity 449.150s 5529.787us 1 1 100.00
sec_cm_rma_entry_mem_sec_wipe 1 1 100.00
flash_ctrl_hw_rma 1110.270s 212452.674us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1490.730s 5527.695us 1 1 100.00
sec_cm_phy_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1490.730s 5527.695us 1 1 100.00
sec_cm_phy_prog_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1490.730s 5527.695us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1490.730s 5527.695us 1 1 100.00
sec_cm_phy_arbiter_ctrl_redun 1 1 100.00
flash_ctrl_phy_arb_redun 10.680s 689.885us 1 1 100.00
sec_cm_phy_host_grant_ctrl_consistency 1 1 100.00
flash_ctrl_phy_host_grant_err 6.870s 73.106us 1 1 100.00
sec_cm_phy_ack_ctrl_consistency 1 1 100.00
flash_ctrl_phy_ack_consistency 13.320s 27.320us 1 1 100.00
sec_cm_fifo_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1490.730s 5527.695us 1 1 100.00
sec_cm_mem_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1490.730s 5527.695us 1 1 100.00
sec_cm_prog_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1490.730s 5527.695us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
asymmetric_read_path 1 1 100.00
flash_ctrl_rd_ooo 18.650s 86.433us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
flash_ctrl_basic_rw 165.120s 773.465us 1 1 100.00