Simulation Results: keymgr

 
04/05/2026 15:30:28 DVSim: v1.33.1 sha: e056f5d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 84.85 %
  • code
  • 93.61 %
  • assert
  • 97.03 %
  • func
  • 63.92 %
  • line
  • 98.52 %
  • branch
  • 97.17 %
  • cond
  • 94.28 %
  • toggle
  • 96.66 %
  • FSM
  • 81.40 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.630s 46.586us 1 1 100.00
random 1 1 100.00
keymgr_random 3.020s 573.781us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.010s 65.677us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.830s 34.613us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 4.670s 258.475us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 6.600s 133.061us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 2.080s 122.341us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.830s 34.613us 1 1 100.00
keymgr_csr_aliasing 6.600s 133.061us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 13.260s 1409.872us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 4.230s 439.060us 1 1 100.00
keymgr_sideload_kmac 4.480s 589.668us 1 1 100.00
keymgr_sideload_aes 18.000s 4658.414us 1 1 100.00
keymgr_sideload_otbn 24.960s 1296.717us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 27.060s 2744.949us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.700s 77.981us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.950s 247.225us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 25.890s 11144.170us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 4.100s 115.838us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 2.750s 77.493us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 12.460s 1020.229us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.810s 10.566us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.770s 73.585us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.280s 257.723us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.280s 257.723us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.010s 65.677us 1 1 100.00
keymgr_csr_rw 0.830s 34.613us 1 1 100.00
keymgr_csr_aliasing 6.600s 133.061us 1 1 100.00
keymgr_same_csr_outstanding 1.590s 46.510us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.010s 65.677us 1 1 100.00
keymgr_csr_rw 0.830s 34.613us 1 1 100.00
keymgr_csr_aliasing 6.600s 133.061us 1 1 100.00
keymgr_same_csr_outstanding 1.590s 46.510us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
keymgr_tl_intg_err 3.720s 110.909us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 2.290s 361.201us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 2.290s 361.201us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 2.290s 361.201us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 2.290s 361.201us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 6.240s 318.485us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.720s 110.909us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 2.290s 361.201us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 13.260s 1409.872us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 3.020s 573.781us 1 1 100.00
keymgr_csr_rw 0.830s 34.613us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 3.020s 573.781us 1 1 100.00
keymgr_csr_rw 0.830s 34.613us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 3.020s 573.781us 1 1 100.00
keymgr_csr_rw 0.830s 34.613us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.700s 77.981us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 4.100s 115.838us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 4.100s 115.838us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 3.020s 573.781us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.850s 36.305us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.800s 250.206us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.700s 77.981us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.800s 250.206us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.800s 250.206us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.800s 250.206us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.330s 438.493us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.800s 250.206us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 14.060s 687.579us 1 1 100.00