Simulation Results: csrng

 
05/05/2026 15:30:24 DVSim: v1.34.0 sha: f7bfc3b json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.54 %
  • code
  • 92.31 %
  • assert
  • 93.23 %
  • func
  • 80.07 %
  • block
  • 96.98 %
  • line
  • 97.73 %
  • branch
  • 92.42 %
  • toggle
  • 93.37 %
  • FSM
  • 85.71 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
csrng_smoke 2.000s 24.907us 1 1 100.00
csr_hw_reset 1 1 100.00
csrng_csr_hw_reset 1.000s 15.908us 1 1 100.00
csr_rw 1 1 100.00
csrng_csr_rw 2.000s 62.113us 1 1 100.00
csr_bit_bash 1 1 100.00
csrng_csr_bit_bash 16.000s 532.098us 1 1 100.00
csr_aliasing 1 1 100.00
csrng_csr_aliasing 6.000s 394.896us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
csrng_csr_mem_rw_with_rand_reset 3.000s 98.767us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
csrng_csr_rw 2.000s 62.113us 1 1 100.00
csrng_csr_aliasing 6.000s 394.896us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
interrupts 1 1 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
alerts 1 1 100.00
csrng_alert 4.000s 102.666us 1 1 100.00
err 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
cmds 1 1 100.00
csrng_cmds 151.000s 17005.936us 1 1 100.00
life cycle 1 1 100.00
csrng_cmds 151.000s 17005.936us 1 1 100.00
stress_all 1 1 100.00
csrng_stress_all 319.000s 8625.830us 1 1 100.00
intr_test 1 1 100.00
csrng_intr_test 1.000s 16.437us 1 1 100.00
alert_test 1 1 100.00
csrng_alert_test 2.000s 33.584us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
csrng_tl_errors 5.000s 257.959us 1 1 100.00
tl_d_illegal_access 1 1 100.00
csrng_tl_errors 5.000s 257.959us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
csrng_csr_hw_reset 1.000s 15.908us 1 1 100.00
csrng_csr_rw 2.000s 62.113us 1 1 100.00
csrng_csr_aliasing 6.000s 394.896us 1 1 100.00
csrng_same_csr_outstanding 2.000s 34.841us 1 1 100.00
tl_d_partial_access 4 4 100.00
csrng_csr_hw_reset 1.000s 15.908us 1 1 100.00
csrng_csr_rw 2.000s 62.113us 1 1 100.00
csrng_csr_aliasing 6.000s 394.896us 1 1 100.00
csrng_same_csr_outstanding 2.000s 34.841us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
csrng_sec_cm 4.000s 438.525us 1 1 100.00
csrng_tl_intg_err 4.000s 111.915us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
csrng_regwen 1.000s 11.148us 1 1 100.00
csrng_csr_rw 2.000s 62.113us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
csrng_alert 4.000s 102.666us 1 1 100.00
sec_cm_intersig_mubi 1 1 100.00
csrng_stress_all 319.000s 8625.830us 1 1 100.00
sec_cm_main_sm_fsm_sparse 3 3 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
csrng_sec_cm 4.000s 438.525us 1 1 100.00
sec_cm_cmd_stage_fsm_sparse 3 3 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
csrng_sec_cm 4.000s 438.525us 1 1 100.00
sec_cm_ctr_drbg_fsm_sparse 3 3 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
csrng_sec_cm 4.000s 438.525us 1 1 100.00
sec_cm_ctr_drbg_ctr_redun 3 3 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
csrng_sec_cm 4.000s 438.525us 1 1 100.00
sec_cm_gen_cmd_ctr_redun 3 3 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
csrng_sec_cm 4.000s 438.525us 1 1 100.00
sec_cm_ctrl_mubi 1 1 100.00
csrng_alert 4.000s 102.666us 1 1 100.00
sec_cm_main_sm_ctr_local_esc 2 2 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
sec_cm_constants_lc_gated 1 1 100.00
csrng_stress_all 319.000s 8625.830us 1 1 100.00
sec_cm_sw_genbits_bus_consistency 1 1 100.00
csrng_alert 4.000s 102.666us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
csrng_tl_intg_err 4.000s 111.915us 1 1 100.00
sec_cm_aes_cipher_fsm_sparse 3 3 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
csrng_sec_cm 4.000s 438.525us 1 1 100.00
sec_cm_aes_cipher_fsm_redun 2 2 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
sec_cm_aes_cipher_ctrl_sparse 2 2 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
sec_cm_aes_cipher_fsm_local_esc 2 2 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
sec_cm_aes_cipher_ctr_redun 3 3 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
csrng_sec_cm 4.000s 438.525us 1 1 100.00
sec_cm_aes_cipher_data_reg_local_esc 2 2 100.00
csrng_intr 6.000s 349.365us 1 1 100.00
csrng_err 1.000s 30.643us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
csrng_stress_all_with_rand_reset 10802.086s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 1 test run
csrng_stress_all_with_rand_reset 23949114817411367712678897578746852507991088056107203191133142148304267682746 None