Simulation Results: csrng

 
06/05/2026 15:30:23 DVSim: v1.34.0 sha: 238ca4d json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 86.16 %
  • code
  • 92.32 %
  • assert
  • 93.23 %
  • func
  • 72.92 %
  • block
  • 97.05 %
  • line
  • 97.80 %
  • branch
  • 92.59 %
  • toggle
  • 93.17 %
  • FSM
  • 85.71 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
csrng_smoke 2.000s 21.819us 1 1 100.00
csr_hw_reset 1 1 100.00
csrng_csr_hw_reset 2.000s 37.412us 1 1 100.00
csr_rw 1 1 100.00
csrng_csr_rw 2.000s 22.256us 1 1 100.00
csr_bit_bash 1 1 100.00
csrng_csr_bit_bash 6.000s 113.030us 1 1 100.00
csr_aliasing 1 1 100.00
csrng_csr_aliasing 4.000s 86.920us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
csrng_csr_mem_rw_with_rand_reset 3.000s 92.895us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
csrng_csr_rw 2.000s 22.256us 1 1 100.00
csrng_csr_aliasing 4.000s 86.920us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
interrupts 1 1 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
alerts 1 1 100.00
csrng_alert 3.000s 51.492us 1 1 100.00
err 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
cmds 1 1 100.00
csrng_cmds 62.000s 4724.386us 1 1 100.00
life cycle 1 1 100.00
csrng_cmds 62.000s 4724.386us 1 1 100.00
stress_all 1 1 100.00
csrng_stress_all 67.000s 7219.674us 1 1 100.00
intr_test 1 1 100.00
csrng_intr_test 2.000s 26.673us 1 1 100.00
alert_test 1 1 100.00
csrng_alert_test 1.000s 20.170us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
csrng_tl_errors 3.000s 44.314us 1 1 100.00
tl_d_illegal_access 1 1 100.00
csrng_tl_errors 3.000s 44.314us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
csrng_csr_hw_reset 2.000s 37.412us 1 1 100.00
csrng_csr_rw 2.000s 22.256us 1 1 100.00
csrng_csr_aliasing 4.000s 86.920us 1 1 100.00
csrng_same_csr_outstanding 4.000s 192.448us 1 1 100.00
tl_d_partial_access 4 4 100.00
csrng_csr_hw_reset 2.000s 37.412us 1 1 100.00
csrng_csr_rw 2.000s 22.256us 1 1 100.00
csrng_csr_aliasing 4.000s 86.920us 1 1 100.00
csrng_same_csr_outstanding 4.000s 192.448us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
csrng_sec_cm 3.000s 226.890us 1 1 100.00
csrng_tl_intg_err 3.000s 218.075us 1 1 100.00
sec_cm_config_regwen 2 2 100.00
csrng_regwen 2.000s 17.809us 1 1 100.00
csrng_csr_rw 2.000s 22.256us 1 1 100.00
sec_cm_config_mubi 1 1 100.00
csrng_alert 3.000s 51.492us 1 1 100.00
sec_cm_intersig_mubi 1 1 100.00
csrng_stress_all 67.000s 7219.674us 1 1 100.00
sec_cm_main_sm_fsm_sparse 3 3 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
csrng_sec_cm 3.000s 226.890us 1 1 100.00
sec_cm_cmd_stage_fsm_sparse 3 3 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
csrng_sec_cm 3.000s 226.890us 1 1 100.00
sec_cm_ctr_drbg_fsm_sparse 3 3 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
csrng_sec_cm 3.000s 226.890us 1 1 100.00
sec_cm_ctr_drbg_ctr_redun 3 3 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
csrng_sec_cm 3.000s 226.890us 1 1 100.00
sec_cm_gen_cmd_ctr_redun 3 3 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
csrng_sec_cm 3.000s 226.890us 1 1 100.00
sec_cm_ctrl_mubi 1 1 100.00
csrng_alert 3.000s 51.492us 1 1 100.00
sec_cm_main_sm_ctr_local_esc 2 2 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
sec_cm_constants_lc_gated 1 1 100.00
csrng_stress_all 67.000s 7219.674us 1 1 100.00
sec_cm_sw_genbits_bus_consistency 1 1 100.00
csrng_alert 3.000s 51.492us 1 1 100.00
sec_cm_tile_link_bus_integrity 1 1 100.00
csrng_tl_intg_err 3.000s 218.075us 1 1 100.00
sec_cm_aes_cipher_fsm_sparse 3 3 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
csrng_sec_cm 3.000s 226.890us 1 1 100.00
sec_cm_aes_cipher_fsm_redun 2 2 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
sec_cm_aes_cipher_ctrl_sparse 2 2 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
sec_cm_aes_cipher_fsm_local_esc 2 2 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
sec_cm_aes_cipher_ctr_redun 3 3 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
csrng_sec_cm 3.000s 226.890us 1 1 100.00
sec_cm_aes_cipher_data_reg_local_esc 2 2 100.00
csrng_intr 4.000s 123.723us 1 1 100.00
csrng_err 1.000s 23.465us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
csrng_stress_all_with_rand_reset 10802.145s 0.000us 0 1 0.00

Error Messages

   Test seed line log context
Job timed out after * minutes 1 test run
csrng_stress_all_with_rand_reset 102686852701013880485413914382419374919503200912988108928189747179402659033764 None