Simulation Results: keymgr

 
06/05/2026 15:30:23 DVSim: v1.34.0 sha: 238ca4d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.92 %
  • code
  • 95.64 %
  • assert
  • 97.49 %
  • func
  • 67.63 %
  • line
  • 98.80 %
  • branch
  • 97.81 %
  • cond
  • 93.04 %
  • toggle
  • 97.84 %
  • FSM
  • 90.70 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 6.130s 1809.972us 1 1 100.00
random 1 1 100.00
keymgr_random 2.630s 146.495us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.110s 13.176us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.990s 18.090us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 5.890s 684.721us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 10.740s 4575.430us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.860s 318.792us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.990s 18.090us 1 1 100.00
keymgr_csr_aliasing 10.740s 4575.430us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.280s 249.198us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 24.610s 1265.320us 1 1 100.00
keymgr_sideload_kmac 4.400s 397.531us 1 1 100.00
keymgr_sideload_aes 2.260s 279.806us 1 1 100.00
keymgr_sideload_otbn 3.780s 532.401us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 1.720s 32.932us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.890s 227.623us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.720s 94.172us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.710s 468.409us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 3.600s 398.552us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.380s 34.038us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 32.020s 3991.431us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.930s 13.713us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.770s 18.092us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.320s 115.128us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.320s 115.128us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.110s 13.176us 1 1 100.00
keymgr_csr_rw 0.990s 18.090us 1 1 100.00
keymgr_csr_aliasing 10.740s 4575.430us 1 1 100.00
keymgr_same_csr_outstanding 1.210s 20.064us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.110s 13.176us 1 1 100.00
keymgr_csr_rw 0.990s 18.090us 1 1 100.00
keymgr_csr_aliasing 10.740s 4575.430us 1 1 100.00
keymgr_same_csr_outstanding 1.210s 20.064us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
keymgr_tl_intg_err 3.960s 357.415us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 2.700s 102.851us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 2.700s 102.851us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 2.700s 102.851us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 2.700s 102.851us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 4.100s 246.376us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.960s 357.415us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 2.700s 102.851us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.280s 249.198us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 2.630s 146.495us 1 1 100.00
keymgr_csr_rw 0.990s 18.090us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 2.630s 146.495us 1 1 100.00
keymgr_csr_rw 0.990s 18.090us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 2.630s 146.495us 1 1 100.00
keymgr_csr_rw 0.990s 18.090us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.890s 227.623us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.600s 398.552us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 3.600s 398.552us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 2.630s 146.495us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.830s 304.195us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.770s 199.042us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.890s 227.623us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.770s 199.042us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.770s 199.042us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.770s 199.042us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.260s 1049.598us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.770s 199.042us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 7.270s 675.796us 1 1 100.00