Simulation Results: kmac/unmasked

 
11/05/2026 15:30:27 DVSim: v1.34.0 sha: 62066fe json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 92.69 %
  • code
  • 89.47 %
  • assert
  • 96.10 %
  • func
  • 92.50 %
  • line
  • 97.56 %
  • branch
  • 95.77 %
  • cond
  • 93.83 %
  • toggle
  • 99.87 %
  • FSM
  • 60.33 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 25.710s 677.758us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 1.320s 138.634us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 1.270s 23.363us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 11.250s 704.253us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 4.180s 197.153us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 2.050s 26.634us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 1.270s 23.363us 1 1 100.00
kmac_csr_aliasing 4.180s 197.153us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 1.010s 30.505us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.350s 94.693us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 1745.030s 23754.445us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 514.220s 18169.691us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 29.050s 3587.217us 1 1 100.00
kmac_test_vectors_sha3_256 1152.540s 79379.358us 1 1 100.00
kmac_test_vectors_sha3_384 18.790s 3559.269us 1 1 100.00
kmac_test_vectors_sha3_512 10.090s 1106.494us 1 1 100.00
kmac_test_vectors_shake_128 2369.190s 106525.971us 1 1 100.00
kmac_test_vectors_shake_256 83.380s 9661.554us 1 1 100.00
kmac_test_vectors_kmac 1.660s 113.251us 1 1 100.00
kmac_test_vectors_kmac_xof 2.370s 411.652us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 184.700s 3330.072us 1 1 100.00
app 1 1 100.00
kmac_app 173.590s 12261.934us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 62.620s 29490.409us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 55.950s 17816.809us 1 1 100.00
error 1 1 100.00
kmac_error 256.090s 48764.811us 1 1 100.00
key_error 1 1 100.00
kmac_key_error 6.390s 995.337us 1 1 100.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 3.120s 457.396us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 3.720s 964.402us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 19.130s 1335.110us 1 1 100.00
entropy_ready_error 1 1 100.00
kmac_entropy_ready_error 21.500s 3600.326us 1 1 100.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.460s 64.931us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 849.790s 15776.328us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.900s 17.624us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 0.880s 40.950us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 1.970s 372.589us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 1.970s 372.589us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 1.320s 138.634us 1 1 100.00
kmac_csr_rw 1.270s 23.363us 1 1 100.00
kmac_csr_aliasing 4.180s 197.153us 1 1 100.00
kmac_same_csr_outstanding 1.720s 85.344us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 1.320s 138.634us 1 1 100.00
kmac_csr_rw 1.270s 23.363us 1 1 100.00
kmac_csr_aliasing 4.180s 197.153us 1 1 100.00
kmac_same_csr_outstanding 1.720s 85.344us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.570s 240.972us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.570s 240.972us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.570s 240.972us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.570s 240.972us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.730s 136.090us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_sec_cm 38.030s 4240.291us 1 1 100.00
kmac_tl_intg_err 2.480s 133.039us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.480s 133.039us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.460s 64.931us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 25.710s 677.758us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 184.700s 3330.072us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.570s 240.972us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 38.030s 4240.291us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 38.030s 4240.291us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 38.030s 4240.291us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 25.710s 677.758us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.460s 64.931us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 38.030s 4240.291us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 41.340s 26691.776us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 25.710s 677.758us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 86.370s 10732.125us 1 1 100.00