Simulation Results: gpio

 
13/05/2026 15:30:31 DVSim: v1.34.0 sha: cadc156 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.05 %
  • code
  • 97.34 %
  • assert
  • 96.84 %
  • func
  • 99.97 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 98.56 %
  • toggle
  • 91.25 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.100s 280.553us 1 1 100.00
gpio_smoke_no_pullup_pulldown 0.920s 240.915us 1 1 100.00
gpio_smoke_en_cdc_prim 0.880s 83.104us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 0.840s 42.459us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.720s 40.843us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.580s 120.698us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 1.810s 1312.827us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.670s 71.602us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.750s 38.232us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.580s 120.698us 1 1 100.00
gpio_csr_aliasing 0.670s 71.602us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.860s 38.971us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 0.740s 25.481us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.810s 316.183us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.050s 60.624us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.170s 259.711us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 2.080s 77.074us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 3.860s 128.719us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 2.950s 91.503us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.730s 98.189us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 31.680s 4965.142us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.580s 21.469us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.590s 10.495us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 1.390s 345.507us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 1.390s 345.507us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.580s 120.698us 1 1 100.00
gpio_same_csr_outstanding 0.750s 54.137us 1 1 100.00
gpio_csr_aliasing 0.670s 71.602us 1 1 100.00
gpio_csr_hw_reset 0.720s 40.843us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.580s 120.698us 1 1 100.00
gpio_same_csr_outstanding 0.750s 54.137us 1 1 100.00
gpio_csr_aliasing 0.670s 71.602us 1 1 100.00
gpio_csr_hw_reset 0.720s 40.843us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 0.770s 51.816us 1 1 100.00
gpio_sec_cm 0.900s 277.577us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 0.770s 51.816us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.590s 15.769us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 1.830s 173.115us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 38390519822168540868429401094478420594381207130977801623371125601049862406251 1229
UVM_INFO @ 4965142423 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1170) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 52402788562836413010141146564888255621368991294002310135434738407659378884344 111
UVM_INFO @ 173114675 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---