Simulation Results: gpio

 
25/05/2026 15:30:28 DVSim: v1.49.1 sha: d315e4a json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.08 %
  • code
  • 97.42 %
  • assert
  • 96.84 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 97.84 %
  • toggle
  • 92.26 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.040s 38.781us 1 1 100.00
gpio_smoke_no_pullup_pulldown 1.530s 45.177us 1 1 100.00
gpio_smoke_en_cdc_prim 0.940s 41.412us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 0.830s 37.997us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.660s 15.312us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.790s 62.619us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 3.240s 1461.888us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.760s 93.982us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.900s 129.798us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.790s 62.619us 1 1 100.00
gpio_csr_aliasing 0.760s 93.982us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 1.130s 35.226us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 1.260s 76.511us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.970s 182.582us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 1.210s 142.573us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.200s 50.947us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 3.070s 292.973us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 10.900s 1322.376us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 2.380s 187.038us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 1.130s 1168.990us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 0.580s 1.656us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.890s 11.586us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.880s 36.442us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 1.200s 21.012us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 1.200s 21.012us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.790s 62.619us 1 1 100.00
gpio_same_csr_outstanding 0.810s 24.873us 1 1 100.00
gpio_csr_aliasing 0.760s 93.982us 1 1 100.00
gpio_csr_hw_reset 0.660s 15.312us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.790s 62.619us 1 1 100.00
gpio_same_csr_outstanding 0.810s 24.873us 1 1 100.00
gpio_csr_aliasing 0.760s 93.982us 1 1 100.00
gpio_csr_hw_reset 0.660s 15.312us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 1.110s 65.009us 1 1 100.00
gpio_sec_cm 0.850s 437.598us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 1.110s 65.009us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.640s 32.930us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 11.240s 3231.016us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 20641229654010910609804052117452222768825811515037356896278717756359181084847 75
UVM_INFO @ 1656444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 82993943329092672776882633637977999659995559205999022973679309689246224595352 342
UVM_INFO @ 3231016438 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---