| V1 |
|
100.00% |
| V2 |
|
100.00% |
| unmapped |
|
0.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| prim_alert_request_test | 4 | 4 | 100.00 | |||
| prim_async_alert | 0.580s | 11.998us | 1 | 1 | 100.00 | |
| prim_async_fatal_alert | 0.570s | 28.912us | 1 | 1 | 100.00 | |
| prim_sync_alert | 0.550s | 9.304us | 1 | 1 | 100.00 | |
| prim_sync_fatal_alert | 0.480s | 27.542us | 1 | 1 | 100.00 | |
| prim_alert_test | 4 | 4 | 100.00 | |||
| prim_async_alert | 0.580s | 11.998us | 1 | 1 | 100.00 | |
| prim_async_fatal_alert | 0.570s | 28.912us | 1 | 1 | 100.00 | |
| prim_sync_alert | 0.550s | 9.304us | 1 | 1 | 100.00 | |
| prim_sync_fatal_alert | 0.480s | 27.542us | 1 | 1 | 100.00 | |
| prim_alert_ping_request_test | 4 | 4 | 100.00 | |||
| prim_async_alert | 0.580s | 11.998us | 1 | 1 | 100.00 | |
| prim_async_fatal_alert | 0.570s | 28.912us | 1 | 1 | 100.00 | |
| prim_sync_alert | 0.550s | 9.304us | 1 | 1 | 100.00 | |
| prim_sync_fatal_alert | 0.480s | 27.542us | 1 | 1 | 100.00 | |
| prim_alert_integrity_errors_test | 4 | 4 | 100.00 | |||
| prim_async_alert | 0.580s | 11.998us | 1 | 1 | 100.00 | |
| prim_async_fatal_alert | 0.570s | 28.912us | 1 | 1 | 100.00 | |
| prim_sync_alert | 0.550s | 9.304us | 1 | 1 | 100.00 | |
| prim_sync_fatal_alert | 0.480s | 27.542us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| prim_alert_init_trigger_test | 4 | 4 | 100.00 | |||
| prim_async_alert | 0.580s | 11.998us | 1 | 1 | 100.00 | |
| prim_async_fatal_alert | 0.570s | 28.912us | 1 | 1 | 100.00 | |
| prim_sync_alert | 0.550s | 9.304us | 1 | 1 | 100.00 | |
| prim_sync_fatal_alert | 0.480s | 27.542us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| Unmapped | 0 | 1 | 0.00 | |||
| prim_async_fatal_alert_with_3_cycles_skew | 0.560s | 28.691us | 0 | 1 | 0.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| Offending 'alert_o' | 1 test run | |||
| prim_async_fatal_alert_with_3_cycles_skew | 40281874449355454124714956565839729635065517823351222926929952461707475885997 | 100 |
UVM_ERROR src/lowrisc_prim_alert_0/rtl/prim_alert_receiver.sv(320) @ 28641000: reporter [ASSERT FAILED] Alert_A
Starting assertion attempts at time 28690579ps: level = 0 arg = i_alert_receiver.PingDiffOk_A (from inst prim_alert_tb (src/lowrisc_dv_prim_alert_sim_0.1/tb/prim_alert_tb.sv:254))
[prim_alert_seq] Ping signal integrity error sequence finished!
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