Simulation Results: clkmgr

 
26/05/2026 15:30:30 DVSim: v1.49.6 sha: cbf0611 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 92.53 %
  • code
  • 97.99 %
  • assert
  • 94.35 %
  • func
  • 85.25 %
  • line
  • 99.00 %
  • branch
  • 98.85 %
  • cond
  • 92.90 %
  • toggle
  • 99.19 %
  • FSM
  • 100.00 %
Validation stages
unmapped
92.59%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 25 27 92.59
clkmgr_smoke 0.940s 81.511us 1 1 100.00
clkmgr_extclk 1.630s 455.013us 1 1 100.00
clkmgr_frequency 7.280s 2486.980us 1 1 100.00
clkmgr_frequency_timeout 6.520s 2298.974us 1 1 100.00
clkmgr_peri 0.890s 25.547us 1 1 100.00
clkmgr_trans 0.870s 29.294us 1 1 100.00
clkmgr_clk_status 0.720s 17.938us 1 1 100.00
clkmgr_idle_intersig_mubi 0.890s 36.801us 1 1 100.00
clkmgr_lc_ctrl_intersig_mubi 0.910s 52.690us 1 1 100.00
clkmgr_lc_clk_byp_req_intersig_mubi 0.740s 25.070us 1 1 100.00
clkmgr_clk_handshake_intersig_mubi 0.810s 50.593us 1 1 100.00
clkmgr_div_intersig_mubi 0.900s 49.525us 1 1 100.00
clkmgr_regwen 2.970s 661.234us 1 1 100.00
clkmgr_shadow_reg_errors 1.220s 82.855us 1 1 100.00
clkmgr_shadow_reg_errors_with_csr_rw 1.840s 111.450us 0 1 0.00
clkmgr_sec_cm 0.810s 5.259us 0 1 0.00
clkmgr_stress_all_with_rand_reset 28.100s 3626.907us 1 1 100.00
clkmgr_stress_all 0.940s 86.797us 1 1 100.00
clkmgr_tl_errors 1.330s 47.032us 1 1 100.00
clkmgr_tl_intg_err 1.430s 127.800us 1 1 100.00
clkmgr_alert_test 0.820s 52.286us 1 1 100.00
clkmgr_csr_hw_reset 0.780s 23.036us 1 1 100.00
clkmgr_csr_rw 0.830s 18.342us 1 1 100.00
clkmgr_csr_bit_bash 6.350s 1607.023us 1 1 100.00
clkmgr_csr_aliasing 1.650s 274.322us 1 1 100.00
clkmgr_same_csr_outstanding 1.210s 70.501us 1 1 100.00
clkmgr_csr_mem_rw_with_rand_reset 0.980s 77.165us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (clkmgr_common_vseq.sv:50) [clkmgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault does not trigger! 1 test run
clkmgr_shadow_reg_errors_with_csr_rw 5126944275724693689603470496005261790651070776031885451013272981668421352393 76
UVM_INFO @ 111449657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1047) virtual_sequencer [clkmgr_common_vseq] Expected alert (fatal_fault) did not fire in * cycles. 1 test run
clkmgr_sec_cm 109900317520522680526495342083277261073060912434720672153742233881343662780219 80
UVM_INFO @ 5258701 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---