| unmapped |
|
93.33% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| Unmapped | 28 | 30 | 93.33 | |||
| otp_ctrl_wake_up | 1.940s | 793.754us | 1 | 1 | 100.00 | |
| otp_ctrl_smoke | 2.460s | 258.379us | 1 | 1 | 100.00 | |
| otp_ctrl_partition_walk | 12.890s | 3554.893us | 1 | 1 | 100.00 | |
| otp_ctrl_low_freq_read | 13.180s | 8322.680us | 1 | 1 | 100.00 | |
| otp_ctrl_init_fail | 5.300s | 3154.079us | 1 | 1 | 100.00 | |
| otp_ctrl_background_chks | 100.200s | 16350.117us | 1 | 1 | 100.00 | |
| otp_ctrl_parallel_lc_req | 11.940s | 641.647us | 1 | 1 | 100.00 | |
| otp_ctrl_parallel_lc_esc | 2.810s | 119.341us | 1 | 1 | 100.00 | |
| otp_ctrl_dai_lock | 20.720s | 946.452us | 1 | 1 | 100.00 | |
| otp_ctrl_dai_errs | 1.680s | 218.588us | 0 | 1 | 0.00 | |
| otp_ctrl_check_fail | 21.110s | 1576.871us | 1 | 1 | 100.00 | |
| otp_ctrl_macro_errs | 26.960s | 3813.491us | 1 | 1 | 100.00 | |
| otp_ctrl_parallel_key_req | 5.370s | 342.302us | 1 | 1 | 100.00 | |
| otp_ctrl_regwen | 5.930s | 307.964us | 1 | 1 | 100.00 | |
| otp_ctrl_test_access | 23.960s | 3299.214us | 1 | 1 | 100.00 | |
| otp_ctrl_stress_all_with_rand_reset | 75.190s | 3115.550us | 1 | 1 | 100.00 | |
| otp_ctrl_stress_all | 49.580s | 15299.504us | 0 | 1 | 0.00 | |
| otp_ctrl_sec_cm | 117.010s | 36938.969us | 1 | 1 | 100.00 | |
| otp_ctrl_tl_errors | 3.820s | 1075.266us | 1 | 1 | 100.00 | |
| otp_ctrl_tl_intg_err | 15.410s | 4873.003us | 1 | 1 | 100.00 | |
| otp_ctrl_alert_test | 1.630s | 274.048us | 1 | 1 | 100.00 | |
| otp_ctrl_intr_test | 1.820s | 608.736us | 1 | 1 | 100.00 | |
| otp_ctrl_mem_walk | 1.680s | 550.410us | 1 | 1 | 100.00 | |
| otp_ctrl_mem_partial_access | 1.110s | 138.837us | 1 | 1 | 100.00 | |
| otp_ctrl_csr_hw_reset | 2.080s | 107.412us | 1 | 1 | 100.00 | |
| otp_ctrl_csr_rw | 1.590s | 140.506us | 1 | 1 | 100.00 | |
| otp_ctrl_csr_bit_bash | 4.980s | 203.726us | 1 | 1 | 100.00 | |
| otp_ctrl_csr_aliasing | 5.240s | 213.238us | 1 | 1 | 100.00 | |
| otp_ctrl_same_csr_outstanding | 2.130s | 73.590us | 1 | 1 | 100.00 | |
| otp_ctrl_csr_mem_rw_with_rand_reset | 3.190s | 430.392us | 1 | 1 | 100.00 | |
| Test | seed | line | log context | |
|---|---|---|---|---|
| UVM_ERROR (otp_ctrl_scoreboard.sv:1202) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: otp_ctrl_core_reg_block.direct_access_rdata_* | 2 test runs | |||
| otp_ctrl_dai_errs | 50399475778336751572535324420288297898389745365260314320004636169982323594171 | 813 |
UVM_INFO @ 218587796 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|
| otp_ctrl_stress_all | 54662837690313495001405163239990608787316567307593534187665488673685528718927 | 27865 |
UVM_INFO @ 15299503587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
|
|