Simulation Results: spi_host

 
26/05/2026 15:30:30 DVSim: v1.49.6 sha: cbf0611 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 92.89 %
  • code
  • 95.03 %
  • assert
  • 94.13 %
  • func
  • 89.50 %
  • block
  • 96.96 %
  • line
  • 98.76 %
  • branch
  • 93.35 %
  • toggle
  • 88.02 %
  • FSM
  • 100.00 %
Validation stages
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 26 26 100.00
spi_host_smoke 50.000s 3029.533us 1 1 100.00
spi_host_speed 2.000s 144.251us 1 1 100.00
spi_host_upper_range_clkdiv 88.000s 4678.662us 1 1 100.00
spi_host_performance 2.000s 37.137us 1 1 100.00
spi_host_sw_reset 30.000s 1637.356us 1 1 100.00
spi_host_overflow_underflow 8.000s 566.741us 1 1 100.00
spi_host_error_cmd 1.000s 18.482us 1 1 100.00
spi_host_event 31.000s 2199.777us 1 1 100.00
spi_host_passthrough_mode 1.000s 51.603us 1 1 100.00
spi_host_status_stall 24.000s 725.368us 1 1 100.00
spi_host_idlecsbactive 2.000s 159.492us 1 1 100.00
spi_host_stress_all 96.000s 5314.135us 1 1 100.00
spi_host_spien 2.000s 341.995us 1 1 100.00
spi_host_tl_errors 2.000s 812.388us 1 1 100.00
spi_host_tl_intg_err 2.000s 286.599us 1 1 100.00
spi_host_sec_cm 1.000s 96.039us 1 1 100.00
spi_host_intr_test 1.000s 48.449us 1 1 100.00
spi_host_alert_test 2.000s 28.531us 1 1 100.00
spi_host_mem_walk 1.000s 39.891us 1 1 100.00
spi_host_mem_partial_access 1.000s 153.224us 1 1 100.00
spi_host_csr_hw_reset 1.000s 54.812us 1 1 100.00
spi_host_csr_rw 1.000s 24.127us 1 1 100.00
spi_host_csr_bit_bash 3.000s 147.913us 1 1 100.00
spi_host_csr_aliasing 1.000s 37.568us 1 1 100.00
spi_host_same_csr_outstanding 1.000s 62.452us 1 1 100.00
spi_host_csr_mem_rw_with_rand_reset 1.000s 22.192us 1 1 100.00