Simulation Results: aes/unmasked

 
28/05/2026 15:30:27 DVSim: v1.49.6 sha: 1d0cf80 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.21 %
  • code
  • 90.32 %
  • assert
  • 97.92 %
  • func
  • 76.40 %
  • block
  • 90.48 %
  • line
  • 92.71 %
  • branch
  • 81.71 %
  • toggle
  • 97.99 %
  • FSM
  • 88.89 %
Validation stages
unmapped
93.75%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 30 32 93.75
aes_wake_up 1.000s 62.673us 1 1 100.00
aes_nist_vectors 4.000s 112.156us 1 1 100.00
aes_deinit 3.000s 82.780us 1 1 100.00
aes_man_cfg_err 2.000s 221.012us 1 1 100.00
aes_readability 2.000s 55.226us 1 1 100.00
aes_smoke 2.000s 198.862us 1 1 100.00
aes_config_error 2.000s 56.500us 1 1 100.00
aes_stress 2.000s 150.019us 1 1 100.00
aes_b2b 8.000s 1429.270us 1 1 100.00
aes_clear 2.000s 102.493us 1 1 100.00
aes_alert_reset 2.000s 169.120us 1 1 100.00
aes_sideload 3.000s 155.382us 1 1 100.00
aes_reseed 2.000s 72.470us 1 1 100.00
aes_fi 2.000s 68.467us 1 1 100.00
aes_control_fi 2.000s 61.641us 1 1 100.00
aes_cipher_fi 3.000s 67.355us 1 1 100.00
aes_ctr_fi 5.000s 332.024us 1 1 100.00
aes_core_fi 2.000s 130.101us 1 1 100.00
aes_stress_all 23.000s 1259.529us 1 1 100.00
aes_stress_all_with_rand_reset 9.000s 6.490us 0 1 0.00
aes_sec_cm 3.000s 451.988us 1 1 100.00
aes_tl_errors 3.000s 132.213us 1 1 100.00
aes_tl_intg_err 2.000s 280.126us 1 1 100.00
aes_shadow_reg_errors 1.000s 57.990us 0 1 0.00
aes_shadow_reg_errors_with_csr_rw 2.000s 162.450us 1 1 100.00
aes_csr_hw_reset 2.000s 112.877us 1 1 100.00
aes_csr_rw 1.000s 54.852us 1 1 100.00
aes_csr_bit_bash 5.000s 1211.102us 1 1 100.00
aes_csr_aliasing 3.000s 192.903us 1 1 100.00
aes_same_csr_outstanding 2.000s 135.187us 1 1 100.00
aes_csr_mem_rw_with_rand_reset 1.000s 144.584us 1 1 100.00
aes_alert_test 1.000s 99.346us 1 1 100.00

Error Messages

   Test seed line log context
UVM_FATAL (cip_base_vseq.sv:1220) [aes_common_vseq] Check failed (vseq_done) 1 test run
aes_stress_all_with_rand_reset 84483162223543607639851197332052206441239438457662792498057410318842359337419 136
UVM_INFO @ 6490006 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:458) [csr_utils_pkg::csr_rd_check.isolation_fork.unmblk1] Check failed obs == exp (* [*] vs * [*]) Regname: aes_reg_block_extended.ctrl_shadowed reset value: * 1 test run
aes_shadow_reg_errors 102359792730610463727802537416695323492648613528901539830057453827165673722001 107
UVM_INFO @ 57989804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---