Simulation Results: alert_handler

 
28/05/2026 15:30:27 DVSim: v1.49.6 sha: 1d0cf80 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 89.81 %
  • code
  • 91.86 %
  • assert
  • 98.23 %
  • func
  • 79.33 %
  • line
  • 99.72 %
  • branch
  • 97.80 %
  • cond
  • 91.20 %
  • toggle
  • 89.92 %
  • FSM
  • 80.65 %
Validation stages
unmapped
92.31%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 24 26 92.31
alert_handler_smoke 10.630s 417.655us 1 1 100.00
alert_handler_random_alerts 20.380s 1045.996us 1 1 100.00
alert_handler_random_classes 46.550s 14679.548us 1 1 100.00
alert_handler_esc_intr_timeout 32.510s 8350.233us 1 1 100.00
alert_handler_esc_alert_accum 65.750s 2106.919us 1 1 100.00
alert_handler_sig_int_fail 18.220s 2316.174us 1 1 100.00
alert_handler_entropy 746.670s 47841.472us 1 1 100.00
alert_handler_ping_timeout 47.620s 25755.904us 0 1 0.00
alert_handler_lpg 870.160s 17578.658us 1 1 100.00
alert_handler_lpg_stub_clk 2643.410s 69034.937us 1 1 100.00
alert_handler_entropy_stress 23.180s 1628.336us 0 1 0.00
alert_handler_stress_all 677.470s 45168.897us 1 1 100.00
alert_handler_shadow_reg_errors_with_csr_rw 181.640s 2562.484us 1 1 100.00
alert_handler_alert_accum_saturation 1.810s 15.835us 1 1 100.00
alert_handler_stress_all_with_rand_reset 61.220s 2985.432us 1 1 100.00
alert_handler_sec_cm 17.660s 481.588us 1 1 100.00
alert_handler_shadow_reg_errors 60.570s 1233.665us 1 1 100.00
alert_handler_tl_errors 9.590s 263.223us 1 1 100.00
alert_handler_tl_intg_err 3.620s 123.422us 1 1 100.00
alert_handler_intr_test 1.270s 18.802us 1 1 100.00
alert_handler_csr_hw_reset 3.810s 273.459us 1 1 100.00
alert_handler_csr_rw 2.470s 62.806us 1 1 100.00
alert_handler_csr_bit_bash 327.800s 39361.648us 1 1 100.00
alert_handler_csr_aliasing 181.750s 4680.489us 1 1 100.00
alert_handler_same_csr_outstanding 12.590s 1188.814us 1 1 100.00
alert_handler_csr_mem_rw_with_rand_reset 5.250s 57.692us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (alert_handler_scoreboard.sv:486) [scoreboard] Check failed intr_state_val == item.d_data (* [*] vs * [*]) reg name: intr_state 1 test run
alert_handler_ping_timeout 108147311508211481510678519423470427414948702365343912576829709411887789168811 90
UVM_INFO @ 25755903583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 1 test run
alert_handler_entropy_stress 43785170862935729591995232829012260922820022066526285240101224797017235980443 202
UVM_INFO @ 1628335927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---