| Unmapped |
26 |
27 |
96.30 |
|
clkmgr_smoke |
0.920s |
36.436us |
1 |
1 |
100.00
|
|
clkmgr_extclk |
0.730s |
19.159us |
1 |
1 |
100.00
|
|
clkmgr_frequency |
1.580s |
202.260us |
1 |
1 |
100.00
|
|
clkmgr_frequency_timeout |
4.520s |
1228.648us |
1 |
1 |
100.00
|
|
clkmgr_peri |
0.990s |
113.698us |
1 |
1 |
100.00
|
|
clkmgr_trans |
0.840s |
24.822us |
1 |
1 |
100.00
|
|
clkmgr_clk_status |
0.750s |
14.505us |
1 |
1 |
100.00
|
|
clkmgr_idle_intersig_mubi |
0.870s |
43.000us |
1 |
1 |
100.00
|
|
clkmgr_lc_ctrl_intersig_mubi |
0.900s |
36.107us |
1 |
1 |
100.00
|
|
clkmgr_lc_clk_byp_req_intersig_mubi |
0.980s |
102.525us |
1 |
1 |
100.00
|
|
clkmgr_clk_handshake_intersig_mubi |
0.790s |
21.865us |
1 |
1 |
100.00
|
|
clkmgr_div_intersig_mubi |
0.760s |
25.069us |
1 |
1 |
100.00
|
|
clkmgr_regwen |
2.330s |
698.117us |
1 |
1 |
100.00
|
|
clkmgr_shadow_reg_errors |
1.560s |
134.129us |
1 |
1 |
100.00
|
|
clkmgr_shadow_reg_errors_with_csr_rw |
2.460s |
125.357us |
1 |
1 |
100.00
|
|
clkmgr_sec_cm |
0.680s |
1.164us |
0 |
1 |
0.00
|
|
clkmgr_stress_all_with_rand_reset |
17.360s |
2402.090us |
1 |
1 |
100.00
|
|
clkmgr_stress_all |
16.060s |
4846.491us |
1 |
1 |
100.00
|
|
clkmgr_tl_errors |
1.330s |
59.728us |
1 |
1 |
100.00
|
|
clkmgr_tl_intg_err |
1.530s |
148.742us |
1 |
1 |
100.00
|
|
clkmgr_alert_test |
0.880s |
19.072us |
1 |
1 |
100.00
|
|
clkmgr_csr_hw_reset |
0.880s |
31.175us |
1 |
1 |
100.00
|
|
clkmgr_csr_rw |
0.790s |
36.690us |
1 |
1 |
100.00
|
|
clkmgr_csr_bit_bash |
4.500s |
1093.445us |
1 |
1 |
100.00
|
|
clkmgr_csr_aliasing |
1.520s |
242.586us |
1 |
1 |
100.00
|
|
clkmgr_same_csr_outstanding |
0.960s |
67.736us |
1 |
1 |
100.00
|
|
clkmgr_csr_mem_rw_with_rand_reset |
1.010s |
94.464us |
1 |
1 |
100.00
|