Simulation Results: edn/edn0

 
28/05/2026 15:30:27 DVSim: v1.49.6 sha: 1d0cf80 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.79 %
  • code
  • 83.71 %
  • assert
  • 96.31 %
  • func
  • 80.36 %
  • line
  • 97.61 %
  • branch
  • 92.33 %
  • cond
  • 88.57 %
  • toggle
  • 87.89 %
  • FSM
  • 52.15 %
Validation stages
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 21 21 100.00
edn_smoke 0.830s 54.591us 1 1 100.00
edn_regwen 0.890s 19.597us 1 1 100.00
edn_genbits 1.130s 123.088us 1 1 100.00
edn_stress_all 2.690s 674.059us 1 1 100.00
edn_stress_all_with_rand_reset 87.820s 5109.940us 1 1 100.00
edn_intr 0.860s 28.389us 1 1 100.00
edn_alert 1.150s 53.296us 1 1 100.00
edn_err 1.030s 36.079us 1 1 100.00
edn_disable 0.840s 14.021us 1 1 100.00
edn_disable_auto_req_mode 1.110s 119.981us 1 1 100.00
edn_sec_cm 6.910s 592.785us 1 1 100.00
edn_tl_errors 2.140s 47.395us 1 1 100.00
edn_tl_intg_err 1.700s 163.820us 1 1 100.00
edn_alert_test 0.910s 219.937us 1 1 100.00
edn_intr_test 0.770s 21.771us 1 1 100.00
edn_csr_hw_reset 0.820s 43.884us 1 1 100.00
edn_csr_rw 0.910s 111.501us 1 1 100.00
edn_csr_bit_bash 3.170s 159.362us 1 1 100.00
edn_csr_aliasing 1.390s 34.586us 1 1 100.00
edn_same_csr_outstanding 0.990s 79.604us 1 1 100.00
edn_csr_mem_rw_with_rand_reset 1.420s 42.288us 1 1 100.00