Simulation Results: edn/edn1

 
01/06/2026 15:30:27 DVSim: v1.49.6 sha: 12b260e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 87.11 %
  • code
  • 81.90 %
  • assert
  • 97.92 %
  • func
  • 81.51 %
  • line
  • 97.88 %
  • branch
  • 92.21 %
  • cond
  • 88.92 %
  • toggle
  • 87.29 %
  • FSM
  • 43.18 %
Validation stages
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 21 21 100.00
edn_smoke 0.810s 41.774us 1 1 100.00
edn_regwen 0.830s 26.807us 1 1 100.00
edn_genbits 1.100s 123.633us 1 1 100.00
edn_stress_all 2.260s 962.581us 1 1 100.00
edn_stress_all_with_rand_reset 21.600s 17131.954us 1 1 100.00
edn_intr 0.870s 45.173us 1 1 100.00
edn_alert 1.080s 72.378us 1 1 100.00
edn_err 0.820s 80.112us 1 1 100.00
edn_disable 1.040s 18.103us 1 1 100.00
edn_disable_auto_req_mode 1.040s 59.876us 1 1 100.00
edn_sec_cm 2.330s 183.893us 1 1 100.00
edn_tl_errors 2.730s 116.686us 1 1 100.00
edn_tl_intg_err 1.230s 188.597us 1 1 100.00
edn_alert_test 0.950s 21.304us 1 1 100.00
edn_intr_test 0.800s 98.776us 1 1 100.00
edn_csr_hw_reset 0.750s 28.678us 1 1 100.00
edn_csr_rw 0.690s 33.802us 1 1 100.00
edn_csr_bit_bash 1.440s 66.227us 1 1 100.00
edn_csr_aliasing 0.960s 30.669us 1 1 100.00
edn_same_csr_outstanding 1.170s 38.781us 1 1 100.00
edn_csr_mem_rw_with_rand_reset 0.940s 159.505us 1 1 100.00