Simulation Results: rom_ctrl/64kb

 
01/06/2026 15:30:27 DVSim: v1.49.6 sha: 12b260e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 97.19 %
  • code
  • 97.82 %
  • assert
  • 97.09 %
  • func
  • 96.66 %
  • line
  • 99.32 %
  • branch
  • 98.54 %
  • cond
  • 97.92 %
  • toggle
  • 100.00 %
  • FSM
  • 93.33 %
Validation stages
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 19 19 100.00
rom_ctrl_smoke 9.130s 1115.664us 1 1 100.00
rom_ctrl_stress_all 20.020s 2290.030us 1 1 100.00
rom_ctrl_max_throughput_chk 9.850s 2060.072us 1 1 100.00
rom_ctrl_corrupt_sig_fatal_chk 143.890s 4666.162us 1 1 100.00
rom_ctrl_kmac_err_chk 18.770s 7959.967us 1 1 100.00
rom_ctrl_stress_all_with_rand_reset 38.900s 1476.252us 1 1 100.00
rom_ctrl_sec_cm 462.070s 2224.081us 1 1 100.00
rom_ctrl_passthru_mem_tl_intg_err 22.680s 843.355us 1 1 100.00
rom_ctrl_tl_errors 9.360s 299.639us 1 1 100.00
rom_ctrl_tl_intg_err 52.970s 1389.088us 1 1 100.00
rom_ctrl_alert_test 5.720s 864.246us 1 1 100.00
rom_ctrl_mem_walk 6.710s 3109.571us 1 1 100.00
rom_ctrl_mem_partial_access 7.270s 297.736us 1 1 100.00
rom_ctrl_csr_hw_reset 11.380s 315.191us 1 1 100.00
rom_ctrl_csr_rw 6.130s 726.809us 1 1 100.00
rom_ctrl_csr_bit_bash 5.830s 2781.066us 1 1 100.00
rom_ctrl_csr_aliasing 6.370s 205.572us 1 1 100.00
rom_ctrl_same_csr_outstanding 5.640s 1138.832us 1 1 100.00
rom_ctrl_csr_mem_rw_with_rand_reset 7.230s 224.038us 1 1 100.00