Simulation Results: gpio

 
04/06/2026 15:30:32 DVSim: v1.49.9 sha: 53fb331 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 98.62 %
  • code
  • 97.42 %
  • assert
  • 98.42 %
  • func
  • 100.00 %
  • line
  • 99.76 %
  • branch
  • 99.80 %
  • cond
  • 98.56 %
  • toggle
  • 91.58 %
Validation stages
V1
100.00%
V2
94.12%
V2S
100.00%
V3
50.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 4 4 100.00
gpio_smoke 1.100s 95.225us 1 1 100.00
gpio_smoke_no_pullup_pulldown 0.720s 44.586us 1 1 100.00
gpio_smoke_en_cdc_prim 1.090s 84.209us 1 1 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 0.820s 121.937us 1 1 100.00
csr_hw_reset 1 1 100.00
gpio_csr_hw_reset 0.650s 63.687us 1 1 100.00
csr_rw 1 1 100.00
gpio_csr_rw 0.580s 40.516us 1 1 100.00
csr_bit_bash 1 1 100.00
gpio_csr_bit_bash 1.100s 67.161us 1 1 100.00
csr_aliasing 1 1 100.00
gpio_csr_aliasing 0.730s 46.939us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
gpio_csr_mem_rw_with_rand_reset 0.660s 21.627us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
gpio_csr_rw 0.580s 40.516us 1 1 100.00
gpio_csr_aliasing 0.730s 46.939us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
direct_and_masked_out 2 2 100.00
gpio_random_dout_din 0.960s 183.220us 1 1 100.00
gpio_random_dout_din_no_pullup_pulldown 0.680s 30.267us 1 1 100.00
out_in_regs_read_write 1 1 100.00
gpio_dout_din_regs_random_rw 0.680s 128.734us 1 1 100.00
gpio_interrupt_programming 1 1 100.00
gpio_intr_rand_pgm 0.790s 284.433us 1 1 100.00
random_interrupt_trigger 1 1 100.00
gpio_rand_intr_trigger 1.850s 575.304us 1 1 100.00
interrupt_and_noise_filter 1 1 100.00
gpio_intr_with_filter_rand_intr_event 1.350s 39.064us 1 1 100.00
noise_filter_stress 1 1 100.00
gpio_filter_stress 9.760s 576.069us 1 1 100.00
regs_long_reads_and_writes 1 1 100.00
gpio_random_long_reg_writes_reg_reads 4.110s 591.705us 1 1 100.00
full_random 1 1 100.00
gpio_full_random 0.630s 37.964us 1 1 100.00
stress_all 0 1 0.00
gpio_stress_all 46.130s 49317.831us 0 1 0.00
alert_test 1 1 100.00
gpio_alert_test 0.710s 24.031us 1 1 100.00
intr_test 1 1 100.00
gpio_intr_test 0.660s 31.726us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
gpio_tl_errors 2.320s 185.455us 1 1 100.00
tl_d_illegal_access 1 1 100.00
gpio_tl_errors 2.320s 185.455us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
gpio_csr_rw 0.580s 40.516us 1 1 100.00
gpio_same_csr_outstanding 0.830s 58.291us 1 1 100.00
gpio_csr_aliasing 0.730s 46.939us 1 1 100.00
gpio_csr_hw_reset 0.650s 63.687us 1 1 100.00
tl_d_partial_access 4 4 100.00
gpio_csr_rw 0.580s 40.516us 1 1 100.00
gpio_same_csr_outstanding 0.830s 58.291us 1 1 100.00
gpio_csr_aliasing 0.730s 46.939us 1 1 100.00
gpio_csr_hw_reset 0.650s 63.687us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
gpio_tl_intg_err 0.930s 89.259us 1 1 100.00
gpio_sec_cm 0.790s 177.325us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
gpio_tl_intg_err 0.930s 89.259us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
straps_data 1 1 100.00
gpio_rand_straps 0.680s 22.752us 1 1 100.00
stress_all_with_rand_reset 0 1 0.00
gpio_stress_all_with_rand_reset 13.360s 1231.579us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (gpio_scoreboard.sv:216) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) 1 test run
gpio_stress_all 6206524798626537738040800504479915293192793394765537239214301704809445598608 1681
UVM_INFO @ 49317830587 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (cip_base_vseq.sv:1220) [gpio_common_vseq] Check failed (vseq_done) 1 test run
gpio_stress_all_with_rand_reset 6746359271679023197545378171384774128155771563004386031522989551144911706488 235
UVM_INFO @ 1231579325 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---