Simulation Results

Simulation Results: i2c

04/06/2026 15:30:32 DVSim: v1.49.9 sha: 53fb331 json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
86.70 %

code
81.88 %

assert
97.67 %

func
80.55 %

line
96.72 %

branch
92.69 %

cond
85.08 %

toggle
89.66 %

FSM
45.24 %

Validation stages

V1		100.00%
V2		90.24%
V2S		100.00%
V3		0.00%

7/7 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
host_smoke				1	1	100.00
	i2c_host_smoke	53.090s	6949.208us	1	1	100.00
target_smoke				1	1	100.00
	i2c_target_smoke	25.050s	5029.550us	1	1	100.00
csr_hw_reset				1	1	100.00
	i2c_csr_hw_reset	0.700s	60.948us	1	1	100.00
csr_rw				1	1	100.00
	i2c_csr_rw	0.870s	27.116us	1	1	100.00
csr_bit_bash				1	1	100.00
	i2c_csr_bit_bash	3.310s	449.678us	1	1	100.00
csr_aliasing				1	1	100.00
	i2c_csr_aliasing	1.480s	995.191us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	i2c_csr_mem_rw_with_rand_reset	1.080s	327.490us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	i2c_csr_rw	0.870s	27.116us	1	1	100.00
	i2c_csr_aliasing	1.480s	995.191us	1	1	100.00

37/41 passed

90.24 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
host_error_intr				0	1	0.00
	i2c_host_error_intr	0.780s	88.098us	0	1	0.00
host_stress_all				0	1	0.00
	i2c_host_stress_all	1.060s	23.845us	0	1	0.00
host_maxperf				1	1	100.00
	i2c_host_perf	9.810s	1107.883us	1	1	100.00
host_override				1	1	100.00
	i2c_host_override	0.870s	17.524us	1	1	100.00
host_fifo_watermark				1	1	100.00
	i2c_host_fifo_watermark	63.320s	18639.660us	1	1	100.00
host_fifo_overflow				1	1	100.00
	i2c_host_fifo_overflow	38.850s	2309.916us	1	1	100.00
host_fifo_reset				3	3	100.00
	i2c_host_fifo_reset_fmt	1.270s	255.097us	1	1	100.00
	i2c_host_fifo_fmt_empty	3.670s	3586.678us	1	1	100.00
	i2c_host_fifo_reset_rx	6.690s	203.454us	1	1	100.00
host_fifo_full				1	1	100.00
	i2c_host_fifo_full	83.320s	2073.904us	1	1	100.00
host_timeout				1	1	100.00
	i2c_host_stretch_timeout	9.600s	1661.315us	1	1	100.00
i2c_host_mode_toggle				0	1	0.00
	i2c_host_mode_toggle	1.320s	108.129us	0	1	0.00
target_glitch				0	1	0.00
	i2c_target_glitch	2.700s	1085.097us	0	1	0.00
target_stress_all				1	1	100.00
	i2c_target_stress_all	77.020s	34201.617us	1	1	100.00
target_maxperf				1	1	100.00
	i2c_target_perf	4.320s	1593.086us	1	1	100.00
target_fifo_empty				2	2	100.00
	i2c_target_stress_rd	10.880s	4068.449us	1	1	100.00
	i2c_target_intr_smoke	2.670s	3995.542us	1	1	100.00
target_fifo_reset				2	2	100.00
	i2c_target_fifo_reset_acq	0.910s	601.475us	1	1	100.00
	i2c_target_fifo_reset_tx	1.420s	607.982us	1	1	100.00
target_fifo_full				3	3	100.00
	i2c_target_stress_wr	130.650s	41475.864us	1	1	100.00
	i2c_target_stress_rd	10.880s	4068.449us	1	1	100.00
	i2c_target_intr_stress_wr	19.480s	23090.481us	1	1	100.00
target_timeout				1	1	100.00
	i2c_target_timeout	5.520s	4332.530us	1	1	100.00
target_clock_stretch				1	1	100.00
	i2c_target_stretch	3.060s	1661.907us	1	1	100.00
bad_address				1	1	100.00
	i2c_target_bad_addr	3.840s	5589.700us	1	1	100.00
target_mode_glitch				1	1	100.00
	i2c_target_hrst	1.980s	303.605us	1	1	100.00
target_fifo_watermark				2	2	100.00
	i2c_target_fifo_watermarks_acq	1.670s	1476.342us	1	1	100.00
	i2c_target_fifo_watermarks_tx	1.200s	180.043us	1	1	100.00
host_mode_config_perf				2	2	100.00
	i2c_host_perf	9.810s	1107.883us	1	1	100.00
	i2c_host_perf_precise	95.230s	24364.675us	1	1	100.00
host_mode_clock_stretching				1	1	100.00
	i2c_host_stretch_timeout	9.600s	1661.315us	1	1	100.00
target_mode_tx_stretch_ctrl				1	1	100.00
	i2c_target_tx_stretch_ctrl	2.510s	156.733us	1	1	100.00
target_mode_nack_generation				3	3	100.00
	i2c_target_nack_acqfull	1.860s	5274.320us	1	1	100.00
	i2c_target_nack_acqfull_addr	1.980s	1071.549us	1	1	100.00
	i2c_target_nack_txstretch	1.470s	982.628us	1	1	100.00
host_mode_halt_on_nak				1	1	100.00
	i2c_host_may_nack	5.650s	2677.075us	1	1	100.00
target_mode_smbus_maxlen				1	1	100.00
	i2c_target_smbus_maxlen	1.510s	2323.597us	1	1	100.00
alert_test				1	1	100.00
	i2c_alert_test	0.630s	17.484us	1	1	100.00
intr_test				1	1	100.00
	i2c_intr_test	0.680s	19.659us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	i2c_tl_errors	1.300s	201.896us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	i2c_tl_errors	1.300s	201.896us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	i2c_csr_hw_reset	0.700s	60.948us	1	1	100.00
	i2c_csr_rw	0.870s	27.116us	1	1	100.00
	i2c_csr_aliasing	1.480s	995.191us	1	1	100.00
	i2c_same_csr_outstanding	0.970s	36.477us	1	1	100.00
tl_d_partial_access				4	4	100.00
	i2c_csr_hw_reset	0.700s	60.948us	1	1	100.00
	i2c_csr_rw	0.870s	27.116us	1	1	100.00
	i2c_csr_aliasing	1.480s	995.191us	1	1	100.00
	i2c_same_csr_outstanding	0.970s	36.477us	1	1	100.00

V2S

2/2 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	i2c_tl_intg_err	1.340s	78.480us	1	1	100.00
	i2c_sec_cm	1.060s	160.204us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	i2c_tl_intg_err	1.340s	78.480us	1	1	100.00

0/3 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Total
host_stress_all_with_rand_reset				1
	i2c_host_stress_all_with_rand_reset	10.400s	532.897us	1
target_error_intr				1
	i2c_target_unexp_stop	1.070s	311.155us	1
target_stress_all_with_rand_reset				1
	i2c_target_stress_all_with_rand_reset	11.840s	4233.830us	1

Error Messages

	Test	seed	line	log context
UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between				2 test runs
	i2c_host_error_intr	78153589450830698050173182227335945077911533618540561385752704135653173138287	96	UVM_INFO @ 88097611 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	i2c_host_stress_all	103949172832638905834082241350027716988775428538994958548909905278493764270899	92	UVM_INFO @ 23844616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.				2 test runs
	i2c_host_stress_all_with_rand_reset	100656033259140159078596513294031151560244556059202034711680800404225410528733	95	UVM_INFO @ 532897008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	i2c_target_stress_all_with_rand_reset	70033416423936407572398004998023396333976291748009135641374272651824344335990	101	UVM_INFO @ 4233829822 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between				1 test run
	i2c_target_glitch	69781630058320105391995578240944450057037757186087248497114510389191472452116	84	UVM_INFO @ 1085096711 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [] vs [*])				1 test run
	i2c_target_unexp_stop	78894518617141199926886985481437746905312216472671112412320876565622408871731	78	UVM_INFO @ 311154948 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared:				1 test run
	i2c_host_mode_toggle	108546212369407079463535132715095369837821075899317738435118409187942522465895	85	---------------------------------------------------- Name Type Size Value ---------------------------------------------------- mon_dut_item i2c_item - @16071