Simulation Results: keymgr

 
04/06/2026 15:30:32 DVSim: v1.49.9 sha: 53fb331 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.96 %
  • code
  • 94.62 %
  • assert
  • 97.49 %
  • func
  • 68.76 %
  • line
  • 98.72 %
  • branch
  • 97.44 %
  • cond
  • 93.16 %
  • toggle
  • 97.72 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 4.960s 2826.639us 1 1 100.00
random 1 1 100.00
keymgr_random 57.330s 8491.407us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.870s 44.110us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.850s 21.247us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 4.840s 147.865us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 3.380s 139.002us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.260s 26.879us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.850s 21.247us 1 1 100.00
keymgr_csr_aliasing 3.380s 139.002us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.460s 86.266us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.790s 901.800us 1 1 100.00
keymgr_sideload_kmac 2.660s 285.585us 1 1 100.00
keymgr_sideload_aes 5.040s 418.924us 1 1 100.00
keymgr_sideload_otbn 29.260s 3428.650us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.020s 91.955us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.060s 82.197us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.780s 505.698us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 3.910s 130.657us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.370s 54.356us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.400s 148.520us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 12.880s 354.037us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.870s 11.100us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.890s 23.556us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.930s 55.968us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.930s 55.968us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.870s 44.110us 1 1 100.00
keymgr_csr_rw 0.850s 21.247us 1 1 100.00
keymgr_csr_aliasing 3.380s 139.002us 1 1 100.00
keymgr_same_csr_outstanding 1.880s 239.209us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.870s 44.110us 1 1 100.00
keymgr_csr_rw 0.850s 21.247us 1 1 100.00
keymgr_csr_aliasing 3.380s 139.002us 1 1 100.00
keymgr_same_csr_outstanding 1.880s 239.209us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
keymgr_tl_intg_err 3.950s 263.313us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.660s 49.293us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.660s 49.293us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.660s 49.293us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.660s 49.293us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 5.030s 1776.507us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.950s 263.313us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.660s 49.293us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.460s 86.266us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 57.330s 8491.407us 1 1 100.00
keymgr_csr_rw 0.850s 21.247us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 57.330s 8491.407us 1 1 100.00
keymgr_csr_rw 0.850s 21.247us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 57.330s 8491.407us 1 1 100.00
keymgr_csr_rw 0.850s 21.247us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.060s 82.197us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.370s 54.356us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.370s 54.356us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 57.330s 8491.407us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 9.380s 2002.203us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.600s 110.604us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.060s 82.197us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.600s 110.604us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.600s 110.604us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.600s 110.604us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.030s 596.297us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.600s 110.604us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 10.400s 1258.075us 1 1 100.00