Simulation Results: spi_device/2p

 
04/06/2026 15:30:32 DVSim: v1.49.9 sha: 53fb331 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 87.73 %
  • code
  • 94.02 %
  • assert
  • 95.37 %
  • func
  • 73.81 %
  • line
  • 98.95 %
  • branch
  • 98.33 %
  • cond
  • 95.91 %
  • toggle
  • 87.57 %
  • FSM
  • 89.36 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 61.200s 4156.509us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 1.180s 43.976us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 2.180s 377.643us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 16.290s 1395.744us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 11.050s 699.249us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 1.460s 59.546us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 2.180s 377.643us 1 1 100.00
spi_device_csr_aliasing 11.050s 699.249us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.800s 11.275us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.820s 66.599us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 0.880s 43.200us 1 1 100.00
mem_parity 1 1 100.00
spi_device_mem_parity 1.260s 61.698us 1 1 100.00
mem_cfg 1 1 100.00
spi_device_ram_cfg 0.810s 42.320us 1 1 100.00
tpm_read 1 1 100.00
spi_device_tpm_rw 1.010s 163.009us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 1.010s 163.009us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 2.830s 1171.723us 1 1 100.00
spi_device_tpm_sts_read 0.900s 105.639us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 16.240s 5967.780us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 11.290s 20873.957us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 2.010s 114.889us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 2.010s 114.889us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 1.580s 42.865us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 1.580s 42.865us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 1.580s 42.865us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 1.580s 42.865us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 1.580s 42.865us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 2.300s 87.552us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 49.070s 9254.136us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 49.070s 9254.136us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 49.070s 9254.136us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 15.920s 1706.333us 1 1 100.00
spi_device_read_buffer_direct 6.060s 3178.391us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 49.070s 9254.136us 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 41.030s 21099.803us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 3.870s 1262.209us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 3.870s 1262.209us 1 1 100.00
flash_mode_ignore_cmds 1 1 100.00
spi_device_flash_mode_ignore_cmds 5.390s 1418.197us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 61.200s 4156.509us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 35.920s 2440.913us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 83.750s 16435.792us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.730s 15.902us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 0.800s 37.781us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 1.990s 75.177us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 1.990s 75.177us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 1.180s 43.976us 1 1 100.00
spi_device_csr_rw 2.180s 377.643us 1 1 100.00
spi_device_csr_aliasing 11.050s 699.249us 1 1 100.00
spi_device_same_csr_outstanding 2.600s 113.906us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 1.180s 43.976us 1 1 100.00
spi_device_csr_rw 2.180s 377.643us 1 1 100.00
spi_device_csr_aliasing 11.050s 699.249us 1 1 100.00
spi_device_same_csr_outstanding 2.600s 113.906us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_sec_cm 1.140s 227.219us 1 1 100.00
spi_device_tl_intg_err 16.150s 6902.070us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 16.150s 6902.070us 1 1 100.00