Simulation Results: alert_handler

 
08/06/2026 15:30:24 DVSim: v1.49.9 sha: d730ff6 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 89.29 %
  • code
  • 89.89 %
  • assert
  • 98.14 %
  • func
  • 79.85 %
  • line
  • 99.67 %
  • branch
  • 98.22 %
  • cond
  • 91.88 %
  • toggle
  • 85.50 %
  • FSM
  • 74.19 %
Validation stages
V1
100.00%
V2
94.74%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
alert_handler_smoke 19.190s 323.738us 1 1 100.00
csr_hw_reset 1 1 100.00
alert_handler_csr_hw_reset 2.630s 22.698us 1 1 100.00
csr_rw 1 1 100.00
alert_handler_csr_rw 2.350s 95.728us 1 1 100.00
csr_bit_bash 1 1 100.00
alert_handler_csr_bit_bash 66.680s 855.393us 1 1 100.00
csr_aliasing 1 1 100.00
alert_handler_csr_aliasing 188.430s 4995.646us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
alert_handler_csr_mem_rw_with_rand_reset 3.390s 100.751us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
alert_handler_csr_rw 2.350s 95.728us 1 1 100.00
alert_handler_csr_aliasing 188.430s 4995.646us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
esc_accum 1 1 100.00
alert_handler_esc_alert_accum 110.220s 7132.889us 1 1 100.00
esc_timeout 1 1 100.00
alert_handler_esc_intr_timeout 27.520s 2000.206us 1 1 100.00
entropy 1 1 100.00
alert_handler_entropy 491.440s 14816.782us 1 1 100.00
sig_int_fail 1 1 100.00
alert_handler_sig_int_fail 23.850s 656.407us 1 1 100.00
clk_skew 1 1 100.00
alert_handler_smoke 19.190s 323.738us 1 1 100.00
random_alerts 1 1 100.00
alert_handler_random_alerts 10.000s 1317.697us 1 1 100.00
random_classes 1 1 100.00
alert_handler_random_classes 18.830s 327.023us 1 1 100.00
ping_timeout 1 1 100.00
alert_handler_ping_timeout 193.340s 48937.100us 1 1 100.00
lpg 2 2 100.00
alert_handler_lpg 1827.340s 491927.801us 1 1 100.00
alert_handler_lpg_stub_clk 832.710s 28783.551us 1 1 100.00
stress_all 1 1 100.00
alert_handler_stress_all 2744.880s 140944.458us 1 1 100.00
alert_handler_entropy_stress_test 0 1 0.00
alert_handler_entropy_stress 4.340s 1059.386us 0 1 0.00
alert_handler_alert_accum_saturation 1 1 100.00
alert_handler_alert_accum_saturation 1.720s 35.938us 1 1 100.00
intr_test 1 1 100.00
alert_handler_intr_test 1.410s 11.207us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
alert_handler_tl_errors 20.600s 1864.898us 1 1 100.00
tl_d_illegal_access 1 1 100.00
alert_handler_tl_errors 20.600s 1864.898us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
alert_handler_csr_hw_reset 2.630s 22.698us 1 1 100.00
alert_handler_csr_rw 2.350s 95.728us 1 1 100.00
alert_handler_csr_aliasing 188.430s 4995.646us 1 1 100.00
alert_handler_same_csr_outstanding 25.420s 541.869us 1 1 100.00
tl_d_partial_access 4 4 100.00
alert_handler_csr_hw_reset 2.630s 22.698us 1 1 100.00
alert_handler_csr_rw 2.350s 95.728us 1 1 100.00
alert_handler_csr_aliasing 188.430s 4995.646us 1 1 100.00
alert_handler_same_csr_outstanding 25.420s 541.869us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
alert_handler_shadow_reg_errors 56.710s 2943.509us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
alert_handler_shadow_reg_errors 56.710s 2943.509us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
alert_handler_shadow_reg_errors 56.710s 2943.509us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
alert_handler_shadow_reg_errors 56.710s 2943.509us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
alert_handler_shadow_reg_errors_with_csr_rw 698.310s 16454.027us 1 1 100.00
tl_intg_err 2 2 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
alert_handler_tl_intg_err 12.890s 318.979us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
alert_handler_tl_intg_err 12.890s 318.979us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
alert_handler_shadow_reg_errors 56.710s 2943.509us 1 1 100.00
sec_cm_ping_timer_config_regwen 1 1 100.00
alert_handler_smoke 19.190s 323.738us 1 1 100.00
sec_cm_alert_config_regwen 1 1 100.00
alert_handler_smoke 19.190s 323.738us 1 1 100.00
sec_cm_alert_loc_config_regwen 1 1 100.00
alert_handler_smoke 19.190s 323.738us 1 1 100.00
sec_cm_class_config_regwen 1 1 100.00
alert_handler_smoke 19.190s 323.738us 1 1 100.00
sec_cm_alert_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 23.850s 656.407us 1 1 100.00
sec_cm_lpg_intersig_mubi 1 1 100.00
alert_handler_lpg 1827.340s 491927.801us 1 1 100.00
sec_cm_esc_intersig_diff 1 1 100.00
alert_handler_sig_int_fail 23.850s 656.407us 1 1 100.00
sec_cm_alert_rx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 491.440s 14816.782us 1 1 100.00
sec_cm_esc_tx_intersig_bkgn_chk 1 1 100.00
alert_handler_entropy 491.440s 14816.782us 1 1 100.00
sec_cm_esc_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
sec_cm_ping_timer_fsm_sparse 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
sec_cm_esc_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
sec_cm_ping_timer_fsm_local_esc 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
sec_cm_esc_timer_fsm_global_esc 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
sec_cm_accu_ctr_redun 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
sec_cm_esc_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
sec_cm_ping_timer_ctr_redun 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
sec_cm_ping_timer_lfsr_redun 1 1 100.00
alert_handler_sec_cm 9.950s 462.536us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
alert_handler_stress_all_with_rand_reset 36.400s 1758.149us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR sequencer [alert_sender_ping_rsp_seq] Response queue overflow, response was dropped 1 test run
alert_handler_entropy_stress 63680852475338690853058332697958864328179374258834311981776332488094365841652 194
UVM_INFO @ 1059385605 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:1286) [alert_handler_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. 1 test run
alert_handler_stress_all_with_rand_reset 59758640269227568116059374024116849636173690756554122169625590441521870952179 84
UVM_INFO @ 1758149446 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---