Simulation Results: keymgr

 
08/06/2026 15:30:24 DVSim: v1.49.9 sha: d730ff6 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.14 %
  • code
  • 96.11 %
  • assert
  • 97.72 %
  • func
  • 64.59 %
  • line
  • 98.84 %
  • branch
  • 97.90 %
  • cond
  • 93.48 %
  • toggle
  • 97.29 %
  • FSM
  • 93.02 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.480s 66.781us 1 1 100.00
random 1 1 100.00
keymgr_random 4.710s 1053.114us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.220s 66.014us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.950s 18.587us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 10.380s 351.471us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 13.180s 1956.246us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.490s 88.093us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.950s 18.587us 1 1 100.00
keymgr_csr_aliasing 13.180s 1956.246us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.420s 154.967us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.700s 154.625us 1 1 100.00
keymgr_sideload_kmac 31.890s 4460.127us 1 1 100.00
keymgr_sideload_aes 1.950s 185.232us 1 1 100.00
keymgr_sideload_otbn 2.960s 376.122us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 1.820s 56.934us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.740s 490.102us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 3.530s 454.982us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.500s 89.975us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 8.600s 607.045us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.850s 623.691us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 160.490s 43317.995us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.820s 28.318us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.920s 98.697us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.100s 540.236us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.100s 540.236us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.220s 66.014us 1 1 100.00
keymgr_csr_rw 0.950s 18.587us 1 1 100.00
keymgr_csr_aliasing 13.180s 1956.246us 1 1 100.00
keymgr_same_csr_outstanding 2.250s 218.945us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.220s 66.014us 1 1 100.00
keymgr_csr_rw 0.950s 18.587us 1 1 100.00
keymgr_csr_aliasing 13.180s 1956.246us 1 1 100.00
keymgr_same_csr_outstanding 2.250s 218.945us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
keymgr_tl_intg_err 6.700s 1001.984us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 3.060s 150.761us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 3.060s 150.761us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 3.060s 150.761us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 3.060s 150.761us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 3.360s 103.055us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 6.700s 1001.984us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 3.060s 150.761us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.420s 154.967us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 4.710s 1053.114us 1 1 100.00
keymgr_csr_rw 0.950s 18.587us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 4.710s 1053.114us 1 1 100.00
keymgr_csr_rw 0.950s 18.587us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 4.710s 1053.114us 1 1 100.00
keymgr_csr_rw 0.950s 18.587us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.740s 490.102us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 8.600s 607.045us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 8.600s 607.045us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 4.710s 1053.114us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.340s 70.322us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 4.790s 308.869us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.740s 490.102us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.790s 308.869us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.790s 308.869us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.790s 308.869us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 9.550s 1285.810us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 4.790s 308.869us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 6.370s 342.479us 1 1 100.00