Simulation Results: otp_ctrl

 
08/06/2026 15:30:24 DVSim: v1.49.9 sha: d730ff6 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 83.34 %
  • code
  • 79.97 %
  • assert
  • 94.88 %
  • func
  • 75.16 %
  • line
  • 88.79 %
  • branch
  • 84.68 %
  • cond
  • 92.87 %
  • toggle
  • 87.70 %
  • FSM
  • 45.83 %
Validation stages
V1
88.89%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
otp_ctrl_wake_up 2.040s 54.743us 1 1 100.00
smoke 1 1 100.00
otp_ctrl_smoke 4.600s 351.494us 1 1 100.00
csr_hw_reset 1 1 100.00
otp_ctrl_csr_hw_reset 1.460s 78.073us 1 1 100.00
csr_rw 1 1 100.00
otp_ctrl_csr_rw 1.430s 589.238us 1 1 100.00
csr_bit_bash 1 1 100.00
otp_ctrl_csr_bit_bash 6.150s 1142.938us 1 1 100.00
csr_aliasing 1 1 100.00
otp_ctrl_csr_aliasing 4.790s 213.413us 1 1 100.00
csr_mem_rw_with_rand_reset 0 1 0.00
otp_ctrl_csr_mem_rw_with_rand_reset 1.270s 429.076us 0 1 0.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
otp_ctrl_csr_rw 1.430s 589.238us 1 1 100.00
otp_ctrl_csr_aliasing 4.790s 213.413us 1 1 100.00
mem_walk 1 1 100.00
otp_ctrl_mem_walk 1.580s 559.182us 1 1 100.00
mem_partial_access 1 1 100.00
otp_ctrl_mem_partial_access 1.230s 42.331us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
dai_access_partition_walk 1 1 100.00
otp_ctrl_partition_walk 14.670s 1565.277us 1 1 100.00
init_fail 1 1 100.00
otp_ctrl_init_fail 2.550s 128.477us 1 1 100.00
partition_check 2 2 100.00
otp_ctrl_background_chks 17.420s 2806.909us 1 1 100.00
otp_ctrl_check_fail 7.980s 1562.745us 1 1 100.00
regwen_during_otp_init 1 1 100.00
otp_ctrl_regwen 4.530s 2187.577us 1 1 100.00
partition_lock 1 1 100.00
otp_ctrl_dai_lock 15.510s 639.254us 1 1 100.00
interface_key_check 1 1 100.00
otp_ctrl_parallel_key_req 11.960s 2285.612us 1 1 100.00
lc_interactions 2 2 100.00
otp_ctrl_parallel_lc_req 17.450s 3083.988us 1 1 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
otp_dai_errors 1 1 100.00
otp_ctrl_dai_errs 20.440s 5516.366us 1 1 100.00
otp_macro_errors 1 1 100.00
otp_ctrl_macro_errs 8.680s 590.158us 1 1 100.00
test_access 1 1 100.00
otp_ctrl_test_access 29.950s 24627.298us 1 1 100.00
stress_all 1 1 100.00
otp_ctrl_stress_all 46.110s 5896.255us 1 1 100.00
intr_test 1 1 100.00
otp_ctrl_intr_test 1.330s 68.609us 1 1 100.00
alert_test 1 1 100.00
otp_ctrl_alert_test 1.470s 54.400us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
otp_ctrl_tl_errors 3.090s 210.765us 1 1 100.00
tl_d_illegal_access 1 1 100.00
otp_ctrl_tl_errors 3.090s 210.765us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
otp_ctrl_csr_hw_reset 1.460s 78.073us 1 1 100.00
otp_ctrl_csr_rw 1.430s 589.238us 1 1 100.00
otp_ctrl_csr_aliasing 4.790s 213.413us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.180s 285.999us 1 1 100.00
tl_d_partial_access 4 4 100.00
otp_ctrl_csr_hw_reset 1.460s 78.073us 1 1 100.00
otp_ctrl_csr_rw 1.430s 589.238us 1 1 100.00
otp_ctrl_csr_aliasing 4.790s 213.413us 1 1 100.00
otp_ctrl_same_csr_outstanding 2.180s 285.999us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
tl_intg_err 2 2 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
otp_ctrl_tl_intg_err 14.400s 1507.993us 1 1 100.00
prim_count_check 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
prim_fsm_check 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
otp_ctrl_tl_intg_err 14.400s 1507.993us 1 1 100.00
sec_cm_secret_mem_scramble 1 1 100.00
otp_ctrl_smoke 4.600s 351.494us 1 1 100.00
sec_cm_part_mem_digest 1 1 100.00
otp_ctrl_smoke 4.600s 351.494us 1 1 100.00
sec_cm_dai_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_kdi_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_lci_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_part_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_scrmbl_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_timer_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_dai_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_kdi_seed_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_kdi_entropy_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_lci_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_part_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_scrmbl_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_timer_integ_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_timer_cnsty_ctr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_timer_lfsr_redun 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_dai_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_lci_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
sec_cm_kdi_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
sec_cm_part_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
otp_ctrl_macro_errs 8.680s 590.158us 1 1 100.00
sec_cm_scrmbl_fsm_local_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
sec_cm_timer_fsm_local_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_dai_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_lci_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
sec_cm_kdi_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
sec_cm_part_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
otp_ctrl_macro_errs 8.680s 590.158us 1 1 100.00
sec_cm_scrmbl_fsm_global_esc 1 1 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
sec_cm_timer_fsm_global_esc 2 2 100.00
otp_ctrl_parallel_lc_esc 8.080s 1635.531us 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_part_data_reg_integrity 1 1 100.00
otp_ctrl_init_fail 2.550s 128.477us 1 1 100.00
sec_cm_part_data_reg_bkgn_chk 1 1 100.00
otp_ctrl_check_fail 7.980s 1562.745us 1 1 100.00
sec_cm_part_mem_regren 1 1 100.00
otp_ctrl_dai_lock 15.510s 639.254us 1 1 100.00
sec_cm_part_mem_sw_unreadable 1 1 100.00
otp_ctrl_dai_lock 15.510s 639.254us 1 1 100.00
sec_cm_part_mem_sw_unwritable 1 1 100.00
otp_ctrl_dai_lock 15.510s 639.254us 1 1 100.00
sec_cm_lc_part_mem_sw_noaccess 1 1 100.00
otp_ctrl_dai_lock 15.510s 639.254us 1 1 100.00
sec_cm_access_ctrl_mubi 1 1 100.00
otp_ctrl_dai_lock 15.510s 639.254us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
otp_ctrl_smoke 4.600s 351.494us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
otp_ctrl_dai_lock 15.510s 639.254us 1 1 100.00
sec_cm_test_bus_lc_gated 1 1 100.00
otp_ctrl_smoke 4.600s 351.494us 1 1 100.00
sec_cm_test_tl_lc_gate_fsm_sparse 1 1 100.00
otp_ctrl_sec_cm 109.470s 16601.362us 1 1 100.00
sec_cm_direct_access_config_regwen 1 1 100.00
otp_ctrl_regwen 4.530s 2187.577us 1 1 100.00
sec_cm_check_trigger_config_regwen 1 1 100.00
otp_ctrl_smoke 4.600s 351.494us 1 1 100.00
sec_cm_check_config_regwen 1 1 100.00
otp_ctrl_smoke 4.600s 351.494us 1 1 100.00
sec_cm_macro_mem_integrity 1 1 100.00
otp_ctrl_macro_errs 8.680s 590.158us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
otp_ctrl_low_freq_read 1 1 100.00
otp_ctrl_low_freq_read 9.890s 7587.404us 1 1 100.00
stress_all_with_rand_reset 1 1 100.00
otp_ctrl_stress_all_with_rand_reset 97.420s 4981.024us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (otp_ctrl_scoreboard.sv:1825) [scoreboard] Check failed item.d_data == exp_data (* [*] vs * [*]) d_data mismatch when d_error = * 1 test run
otp_ctrl_csr_mem_rw_with_rand_reset 47778311326495627104008928300683562964879600555677904701792437870849281043982 92
UVM_INFO @ 429076174 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---